Sayandeep Saha

ORCID: 0000-0002-5535-1102
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About
Contact & Profiles
Research Areas
  • Cryptographic Implementations and Security
  • Physical Unclonable Functions (PUFs) and Hardware Security
  • Advanced Malware Detection Techniques
  • Chaos-based Image/Signal Encryption
  • Security and Verification in Computing
  • Integrated Circuits and Semiconductor Failure Analysis
  • Coding theory and cryptography
  • Network Security and Intrusion Detection
  • Neuroscience and Neural Engineering
  • Adversarial Robustness in Machine Learning
  • Antenna Design and Analysis
  • Cryptography and Data Security
  • Antenna Design and Optimization
  • Microwave Engineering and Waveguides
  • Cloud Data Security Solutions
  • RNA Interference and Gene Delivery
  • Advanced Data Storage Technologies
  • Electrospun Nanofibers in Biomedical Applications
  • Periodontal Regeneration and Treatments
  • Additive Manufacturing and 3D Printing Technologies
  • Internet Traffic Analysis and Secure E-voting
  • Radiation Effects in Electronics
  • Electrostatic Discharge in Electronics
  • Machine Learning in Bioinformatics
  • Oral and gingival health research

Indian Institute of Technology Kharagpur
2015-2025

Indian Institute of Technology Bombay
2024

University of Wisconsin–Madison
2024

UCLouvain
2023-2024

Nanyang Technological University
2022-2023

Nanyang Institute of Technology
2023

Indian Institute of Engineering Science and Technology, Shibpur
2021-2022

Graz University of Technology
2022

Indian Institute of Technology Madras
2022

National Institute of Technology Patna
2017

Physically Unclonable Function (PUF) designs proposed in the recent literature vary widely diverse characteristics such as hardware resource requirement, reliability, entropy, and robustness against mathematical cloning. Most of standalone PUF suffer from either poor performance profile or unacceptable resource-overhead. We present a novel design paradigm, termed Composition, that utilizes smaller PUFs building blocks to define "Composite PUF" having larger challenge-space superior at...

10.1109/hst.2014.6855567 article EN 2014-05-01

Right from its introduction, fault attacks (FA) have been established to be one of the most practical threats both public key and symmetric based cryptosystems. Statistical Ineffective Fault Analysis (SIFA) is a recently proposed class introduced at CHES 2018. The fascinating feature this attack that it exploits correct ciphertexts obtained during injection campaign, instead faulty ciphertexts. SIFA has shown bypass almost all existing countermeasures even when they are combined with masking...

10.1109/tifs.2019.2952262 article EN IEEE Transactions on Information Forensics and Security 2019-11-07

Post-quantum cryptographic (PQC) algorithms, especially those based on the learning with errors (LWE) problem, have been subjected to several physical attacks in recent past. Although broadly belong two classes – passive side-channel and active fault attacks, attack strategies vary significantly due inherent complexities of such algorithms. Exploring further surfaces is, therefore, an important step for eventually securing deployment these Also, it is mportant test robustness already...

10.46586/tches.v2024.i2.844-869 article EN cc-by IACR Transactions on Cryptographic Hardware and Embedded Systems 2024-03-12

Malicious exploitation of faults for extracting secrets is one the most practical and potent threats to modern cryptographic primitives. Interestingly, not every possible fault a cryptosystem maliciously exploitable, evaluation exploitability nontrivial. In order devise precise defense mechanisms against such rogue faults, comprehensive knowledge required about exploitable part space cryptosystem. Unfortunately, diversified formidable size even while single cryptoprimitive considered...

10.46586/tches.v2018.i2.242-276 article EN cc-by IACR Transactions on Cryptographic Hardware and Embedded Systems 2018-05-08

Block ciphers are widely regarded as concrete realizations of pseudorandom permutations with established security features. However, their applicability outside the domain encryption has not been explored so far. In this paper, we open up, for first time, an entirely novel application them to logic hiding. We show that a combinational circuit can always be embedded within block cipher having bit-permutation based diffusion layer, preserving structure and properties. The functionality becomes...

10.1109/dac18072.2020.9218600 article EN 2020-07-01

Hypoimmune gene edited human pluripotent stem cells (hPSCs) are a promising platform for developing reparative cellular therapies that evade immune rejection. Existing first-generation hypoimmune strategies have used CRISPR/Cas9 editing to modulate genes associated with adaptive (e.g., T cell) responses, but largely not addressed the innate monocytes, neutrophils) mediate inflammation and rejection processes occurring early after graft transplantation. We identified adhesion molecule ICAM-1...

10.1101/2024.06.07.597791 preprint EN cc-by-nc-nd bioRxiv (Cold Spring Harbor Laboratory) 2024-06-09

We describe a novel methodology to exploit the widely used Dynamic Partial Reconfiguration (DPR) support in Field Programmable Gate Arrays (FPGAs) implant hardware Trojan an Advanced Encryption Standard (AES) encryption circuit implemented on FPGA. The DPR is performed by transferring required partial configuration bitstream file over Ethernet connection FPGA board, from attacker's computer which can communicate with network. inserted launches "fault attack" AES circuit, enables recovery of...

10.1145/2668322.2668323 article EN 2014-10-12

Characterizing the fault space of a cipher to filter out set faults potentially exploitable for attacks (FA), is problem with immense practical value.A quantitative knowledge desirable in several applications, like security evaluation, construction and implementation, design, testing countermeasures etc.In this work, we investigate context block ciphers.The formidable size mandates use an automation strategy solve problem, which should be able characterize each individual instance quickly.On...

10.1109/tifs.2018.2868245 article EN IEEE Transactions on Information Forensics and Security 2018-08-31

Recent work has shown that Side-Channel Attacks (SCA) and Fault (FA) can be combined, forming an extremely powerful adversarial model, which bypass even some strongest protections against both FA SCA. However, such form of combined attack comes with practical challenges - 1) a profiled setting multiple fault locations is needed; 2) models are restricted to single-bit set-reset/flips; 3) the input needs repeated several times. In this paper, we propose new strategy called SCA-NFA works in...

10.23919/date56975.2023.10137176 article EN Design, Automation & Test in Europe Conference & Exhibition (DATE), 2015 2023-04-01

Physical attacks are well-known threats to cryptographic implementations. While countermeasures against passive Side-Channel Analysis (SCA) and active Fault Injection (FIA) exist individually, protecting their combination remains a significant challenge. A recent attempt at achieving joint security has been published CCS 2022 under the name CINI-MINIS. The authors introduce relevant notions aim construct arbitrary-order gadgets that remain trivially composable in presence of combined...

10.1145/3576915.3623129 article EN cc-by Proceedings of the 2022 ACM SIGSAC Conference on Computer and Communications Security 2023-11-15

Redundancy based countermeasures against fault attacks are a popular choice in security-critical commercial products, owing to its high coverage and applications safety/reliability. In this paper, we propose combined attack on such countermeasures. The assumes random byte/nibble model with existence of side-channel leakage the final comparison, no knowledge faulty ciphertext. Unlike previously proposed biased/multiple attack, just need corrupt one computation branch. Both analytical...

10.1109/fdtc.2018.00011 article EN 2018-09-01

Current approaches for Hardware Trojan detection have varying degrees of computational and/or design overheads. In this paper, we develop a CAD methodology a-priori estimation vulnerability given circuit at the early stages flow. We security metric to estimate testability HTHs, thus assessing its relative vulnerability. Our overcomes several shortcomings previously proposed metrics in context their applicability HTH problem particular. utilize gate-level ISCAS benchmark circuits. The values...

10.1109/dsd.2016.17 article EN 2016-08-01

Malicious exploitation of faults for extracting secrets is one the most practical and potent threats to modern cryptographic primitives. Interestingly, not every possible fault a cryptosystem maliciously exploitable, evaluation exploitability nontrivial. In order devise precise defense mechanisms against such rogue faults, comprehensive knowledge required about exploitable part space cryptosystem. Unfortunately, diversified formidable size even while single cryptoprimitive considered...

10.13154/tches.v2018.i2.242-276 article EN DOAJ (DOAJ: Directory of Open Access Journals) 2018-05-01

Trained Deep Neural Network (DNN) models are considered valuable Intellectual Properties (IP) in several business models. Prevention of IP theft and unauthorized usage such DNN has been raised as significant concern by industry. In this paper, we address the problem preventing proposing a generic lightweight key-based model-locking scheme, which ensures that locked model functions correctly only upon applying correct secret key. The proposed known Deep-Lock, utilizes S-Boxes with good...

10.48550/arxiv.2008.05966 preprint EN other-oa arXiv (Cornell University) 2020-01-01

The prevalent usage and unparalleled recent success of Deep Neural Network (DNN) applications have raised the concern protecting their Intellectual Property (IP) rights in different business models to prevent theft trade secrets. In this article, we propose a lightweight, generic, key-based DNN IP protection methodology, NN-Lock , defend against unauthorized stolen models. utilizes SBox, cryptographic primitive, with good security properties encrypt each parameter trained model secret keys...

10.1145/3505634 article EN ACM Journal on Emerging Technologies in Computing Systems 2022-02-02

Exploitable fault models for block ciphers are typically cipher-specific, and their identification is essential evaluating certifying attack-protected implementations. However, identifying exploitable has been a complex manual process. In this work, we utilize reinforcement learning (RL) to identify generically automatically. contrast the several weeks/months of tedious analyses required from experts, our RL-based approach identifies protected/unprotected AES GIFT within 12 hours. Notably,...

10.1109/dac56929.2023.10247953 article EN 2023-07-09

Assessment of the security provided by a fault attack countermeasure is challenging, given that protected cipher may leak key if not designed correctly. This paper proposes, for first time, statistical framework to detect information leakage in countermeasures. Based on concept non-interference, we formalize attacks and provide t-test based methodology assessment. One major strength proposed can be detected without complete knowledge algorithm, solely observing faulty ciphertext...

10.1145/3316781.3317763 article EN 2019-05-23

Page Frame Cache (PFC) is a purely software cache, present in modern Linux based operating systems (OS), which stores the page frames that were recently released by processes running on particular CPU. In this paper, we show frame cache can be maliciously exploited an adversary to steer pages of victim process some pre-decided attacker-chosen locations memory. We practically demonstrate end-to-end attack, ExplFrame, where attacker having only user-level privilege able force process's memory...

10.23919/date48585.2020.9116219 article EN Design, Automation & Test in Europe Conference & Exhibition (DATE), 2015 2020-03-01
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