A5003303436- Analog and Mixed-Signal Circuit Design
- CCD and CMOS Imaging Sensors
- Advancements in PLL and VCO Technologies
- Advancements in Semiconductor Devices and Circuit Design
- Sensor Technology and Measurement Systems
- Efficiency Analysis Using DEA
- Radio Frequency Integrated Circuit Design
- Supply Chain and Inventory Management
- Low-power high-performance VLSI design
- Economic Growth and Productivity
- Consumer Market Behavior and Pricing
- Advanced Sensor and Control Systems
- Scheduling and Optimization Algorithms
- VLSI and Analog Circuit Testing
- Photonic and Optical Devices
- Sustainable Supply Chain Management
- Advanced Algorithms and Applications
- Economic and Environmental Valuation
- Advanced MEMS and NEMS Technologies
- Digital Platforms and Economics
- Banking stability, regulation, efficiency
- Image Processing Techniques and Applications
- Advanced DC-DC Converters
- Optimization and Mathematical Programming
- Embedded Systems and FPGA Design
Hefei University of Technology
2014-2025
Hunan University
2025
Shenzhen Polytechnic
2022-2024
Polytechnic University
2024
University of Nevada, Las Vegas
2008-2024
Fudan University
2022
Ya'an Polytechnic College
2013-2016
University of Science and Technology of China
2016
University of Nevada, Reno
2011
Hefei Urban Planning & Design Institute
2010
In this paper, under a dual-channel supply chain consisting of manufacturer and multiple retailers, we investigate vertical horizontal information sharing in different channel structures the manufacturer’s choice on whether or not to keep direct channel. To end, first study structure where uncertain demand is linear function price with generalised-distribution base show that retailers have incentives share horizontally but vertically, while better off its expected profit affected by sharing....
Background Patients with severe traumatic optic neuropathy (TON) often show limited improvement in visual function despite therapy. Objective This study aims to investigate whether targeted shortwave diathermy (SWD) combined perceptual training enhances patients TON following endoscopic nerve decompression (EOND) surgery. Methods Forty after EOND surgery were randomly assigned either the rehabilitation (Reh) group ( n = 24) or non-rehabilitation (Nreh) 16). Subjects Reh received SWD therapy...
This article presents a pipeline analog-to-digital converter (ADC) background calibration method that combines genetic algorithm (GA) and neural network (NN) algorithm. The proposed uses ADC outputs or individual stage sub-ADC for NN training , employs GA global optimization of the NN's initial setup to avoid local optima traps, utilizes parallel architecture create high-throughput circuit with optimized multiply-accumulator (MAC) minimize resource consumption. Through simulation on 6-stage...
Technology scaling results in that, single event effects, such as double-upset due to double-node charge sharing, and transient (i.e. an invalid pulse) propagated from upstream combinational blocks, are becoming increasingly serious with technology evolution. In this paper, a fully immune filterable latch is proposed 65 nm CMOS technology. By means of triple-input Muller C-element, which driven through clock gating based triple path DICE, all internal nodes output node the not only...
This paper applies Data Envelopment Analysis (DEA) to determine relative efficiencies of state-owned and joint stock banks in Chongqing, China, during the period 1996?2000. A distinction is made between long- short-run inefficiencies allow for fact that are relatively new China have more modern management access international finance markets while generally use government funding. Using Mann?Whitney rank order statistics produces results favour but not long-run. way distinguishing...
A high-performance bootstrap switch for low-voltage switched-capacitor (SC) circuits is presented. The enables the precise sampling of input signals on a low voltage supply with high speed, nonlinear distortion. Experimental results in TSMC 130nm CMOS process show that peak signal-to-noise-and-distortion ratio (SNDR) 102.8 dB, spurious-free dynamic range (SFDR) 104.6 dB and total harmonic distortion (THD) 105 can be acquired at 125 MSample/s.
When a manufacturer adds direct sales channel to its existing retail channel, retailers may cooperate with one another respond this new competition. Our study develops Cournot competition model in dual-channel supply chain consisting of and multiple retailers. In Stackelberg decision model, the first sets quantity wholesale price, then decide order quantities. The results indicate that forming an alliance is not always beneficial for cost high, there less likelihood collaborate. On other...
Many studies examine information sharing in an uncertain demand environment a supply chain. However there is little literature on cost dual-channel structure consisting of retail channel and direct sales channel. Assuming that the sale are random variables with general distribution, paper investigates retailer’s choice Bertrand competition model. Based equilibrium outcome sharing, manufacturer’s discussed detail. Our provides several interesting conclusions. In both single- structures,...
ABSTRACT To meet customer requirements efficiently, a manager needs to supply adequate quantities of products, capacity, or services at the right time with prices. Revenue management (RM) techniques can help firms use differential pricing strategies and capacity allocation tactics maximize revenue. In this article, we propose marginal revenue‐based (MRBCM) model manage stochastic demand in order create improved revenue opportunities. The new heuristic employs opportunity cost estimation...
A complete six-order CMOS differential ring voltage-controlled oscillator (VCO) is designed with a 0.35/m process in this paper. The circuit has been successfully applied CPPLL of high-speed high-resolution DAC, and taped out passed the test. relative factors that influence VCO phase noise are analyzed comprehensively to instruct design. includes unit circuit, bias for tail current source, start-up wave shaping circuit. oscillation frequency ranges from 96 MHz 400 MHz. An improved was...
This paper presents a 65nm 8-bit 10MS/s asynchronous successive approximation register analog to digital converter (SAR ADC). SAR ADC adopts resistor-capacitor array (DAC) that has more advantages than only resistors or capacitors. kind of DAC reduces the capacitance area, while ensuring processes good integral nonlinearity and differential nonlinearity. In addition, design uses sequential logic control ensure regular operates by feedback signals from comparator when comparison is completed,...
A high-performance CMOS band-gap reference (BGR) is designed in this paper. The proposed circuit employs the current-mode architecture optimized for low supply voltage applications. key portion of Brokaw BGR architecture, which a three-stage operational amplifier adopted to get high PSRR and only first-order temperature compensation technology employed coefficient. on Chartered 0.18 μ m process under operating 1.8V its simulation results are presented. show that coefficient 9 ppm/°K over...