This brief presents an energy-efficient electrocardiogram processor for arrhythmia detection with a weak-strong hybrid classifier that includes weak linear (WLC) and strong support vector machine (SVM) classifier. WLC can only identify the beats distinct characteristics by performing simple threshold comparisons based on beat interval feature novel morphology named QRS area ratio. The are unclassified will activate more powerful but energy-guzzling SVM Principal component analysis (PCA) is...

A series of polyimides were synthesized <italic>via</italic> a polycondensation 2′,7′-bis(4-aminophenoxy)-spiro(fluorene-9,9′-xanthene) with aromatic tetracarboxylic dianhydrides. They exhibited low dielectric constant, moisture absorption, excellent solubility, high glass transition temperatures and optical transparency.

Arrhythmia classification based on electrocardiogram (ECG) is crucial in automatic cardiovascular disease diagnosis.The methods used the current practice largely depend hand-crafted manual features.However, extracting features may introduce significant computational complexity, especially transform domains.In this study, an accurate method for patient-specific ECG beat proposed, which adopts morphological and timing information.As to of heartbeat, attentionbased two-level 1-D CNN...

This brief presents an energy-efficient level shifter (LS) to convert a subthreshold input signal above-threshold output signal. In order achieve wide range of conversion, dual current mirror (CM) structure consisting virtual CM and auxiliary is proposed. The circuit has been implemented optimized in SMIC 40-nm technology. postlayout simulation demonstrates that the new LS can voltage conversion from 0.2 1.1 V. Moreover, at target 0.3 V, proposed exhibits average propagation delay 66.48 ns,...

Flash memory is becoming an attractive alternative to traditional hard disks, because of its small-size, shock-resistant, power-economic, and non-volatile natures. In order utilize the special I/O properties flash a lot new database technologies have been proposed. However, it comes be critical problem that researchers are difficult evaluate their algorithms on current DBMS. People usually design implement different simulating tools verify this brings much redundant work. paper, we aim at...

With rapid increase of the capacity flash-memory storage systems, it becomes critical to provide efficient management for large-scale flash-memory. Compared with FTL (Flash Translation Layer), NFTL (NAND Flash Layer) provides less main-memory space requirements flash memory. However, because each replacement block is exclusively used by a logical block, exhibits poor utilization In this paper, we present an adaptive block-set based memory management. The presented scheme adopts shared and...

Flash memory has been widely used in various embedded computing systems and portable devices recent years because of its small size, shock-resistance, low-power consumption non-volatile properties. To hide the disadvantages flash such as out-of-place update, a translation layer (FTL) is usually for providing transparent block-device emulation. But when index structures are implemented over FTL, intensive overwrite operations caused by record inserting, deleting, modifying reorganizing could...

Recurrent neural networks (RNNs) perform excellently on sequencing tasks but are severely restricted by the complex computations and intensive memory consumption due to their internal fully connected topologies, thereby making it a great challenge implement RNNs embedded devices. In this brief, we propose an energy-efficient RNN processor exploiting data locality in network compression using innovative quantified sparse matrix encoding format. Compared with conventional processors for...

In advanced technology nodes, large timing margins must be added to allow for worse process, voltage, temperature, and aging variations. The error detection correction (EDAC) technique effectively eliminates these by speculation, but the high design complexity hardware cost make many existing EDAC systems unsuitable commercial processors. Based on instruction-level locality of errors, a collaborative approach is proposed address this issue. layer adopts simple low circuits ensure correct...

ALFIA (Automated Lymphatic Function Imaging Analysis), an algorithm providing quantitative analysis of investigational near-infrared fluorescence lymphatic images, is described. Images from nine human subjects were analyzed for apparent propagation velocities and propulsion periods using manual ALFIA. While was more easily detected than with analysis, statistical analyses indicate no significant difference in the although tended to calculate longer periods. With base algorithms validated,...

Flash memory based embedded systems are becoming increasingly prevalent. Garbage collection mechanism is a critical issue in these systems, especially real-time systems. Therefore, this article, we discuss the influence of capacity utilization (percentage fullness) flash on allocating and recycling, propose new management technique, namely PETFM. The proposed technique improves performance garbage by free pages from different allocated-blocks for data to be updated, their predicted...

This paper presents an automated patient-specific ECG classification algorithm, which integrates long short-term memory (LSTM) and convolutional neural networks (CNN). While LSTM extracts the temporal features, such as heart rate variance (HRV) beat-to-beat correlation from sequential heartbeats, CNN captures detailed morphological characteristics of current heartbeat. To further improve performance, adaptive segmentation re-sampling are applied to align heartbeats different patients with...

Wide voltage range circuit has got widespread attention where in-situ timing monitoring based adaptive scaling (AVS) becomes necessary to reduce the design margin. However, severe PVT variations across near-threshold super-threshold cause too many critical paths be monitored. Here activation oriented selection method is proposed monitored for wide IC. The minimum delay value of longest activated path found by dynamic analysis and set as threshold. Those longer than this threshold STA are...

Energy-efficiency optimization occupies an important position in the Internet of Things application. The error-resilience technique has begun to emerge and brought performance energy benefits as a new vision for alternative computing, because it eliminates overconstrained margin current processor design flow protects system from process, supply voltage, temperature, aging variations through error-resilient mechanism rather than expensive guardbands. However, traditional clock-tree power...

Timing error resilience is a promising alternative to eliminate margins and improve energy efficiency in subthreshold near-threshold processors. However, the existing techniques have some limitations, such as uncontaminated architecture registers (ARs), strict timing constraints on consolidation propagation, high design complexity. To address these new technique based sacrificial instruction-level proposed. It dynamically captures incrementally records changes of ARs at each instruction...

This work presents a low power dual-mode electrocardiogram (ECG) processor with QRS detection and ECG signal lossless compression. An adaptive difference-insensitive filter is proposed to eliminate redundant information in for detection, which helps minimize calculation power. It also adopted as noise estimator used improve the tolerance of detector. Furthermore, compression mode, linear predictor novel length encoder applied data compression, achieving ratio (CR) 2.42 1.06 K gate count....

An R-peak detection method with a high noise tolerance is presented in this paper. This utilizes customized deep convolution neural network (DCNN) to extract morphological and temporal features from sliced electrocardiogram (ECG) signals. The proposed adopts multiple parallel dilated layers analyze diverse fields of view. A sliding window slices the original ECG signals into segments, then calculates one segment at time outputs every point's probability belonging regions. After binarization...

This work presents an electrocardiogram (ECG) compression processor for wireless sensors with configurable data lossless and lossy compression. Lifting wavelet transforms of 9/7-M 5/3 are employed signal decomposition instead traditional wavelet. A hybrid encoding scheme improves efficiency by the higher scales decomposed coefficients modified embedded zero-tree (EZW) lowest scale Huffman encoding. Besides, a transposable register matrix buffering during EZW lowers processing frequency...