- Analog and Mixed-Signal Circuit Design
- Embedded Systems Design Techniques
- Real-Time Systems Scheduling
- Advancements in PLL and VCO Technologies
- Low-power high-performance VLSI design
- CCD and CMOS Imaging Sensors
- Parallel Computing and Optimization Techniques
- Smart Grid Security and Resilience
- Real-time simulation and control systems
- Advancements in Semiconductor Devices and Circuit Design
- Sensor Technology and Measurement Systems
- Error Correcting Code Techniques
- Radio Frequency Integrated Circuit Design
- Advanced Wireless Communication Techniques
- Wireless Body Area Networks
- Interconnection Networks and Systems
- Microgrid Control and Optimization
- Context-Aware Activity Recognition Systems
- Smart Grid Energy Management
- Model-Driven Software Engineering Techniques
- Cellular Automata and Applications
- Healthcare Technology and Patient Monitoring
- Radiation Detection and Scintillator Technologies
- Neural Networks and Applications
- Power Systems Fault Detection
University of Patras
2015-2024
Corporación Universitaria Autónoma del Cauca
2020
Techno India University
2020
Research Academic Computer Technology Institute
2007-2018
PyroGenesis (Greece)
2009-2011
Science and Technology Park of Crete
2008
Synergy University
1994
The continuous penetration of renewable energy resources (RES) into the mix and transition traditional electric grid towards a more intelligent, flexible interactive system, has brought electrical load forecasting to foreground smart planning operation. Predicting is challenging task due its high volatility uncertainty, either when it refers distribution system or single household. In this paper, novel methodology introduced which leverages advantages state-of-the-art deep learning...
The massive penetration of Distributed Energy Resources (DER) and high speed power electronics, even at the distribution grid edge, increases management operational complexity network while necessitates predictive maintenance, control failure prediction mechanisms in near real time. A subsystem comprises a CPS (Cyber Physical System) where Cyber part is enabled by low latency IIoT computational resources edge (distribution controller) physical system represented (Digital Twin) hybrid model...
The proliferation of Internet Things (IoT) devices for patient monitoring has gained much attention in clinical care performance, proficient chronic disease management, and home caregiving. This work presents the design efficient medical IoT sensor nodes (SNs) terms low-cost, low power-consumption, increased data accuracy based on open-source platforms. method utilizes a Sensor Controller (SC) within SN, which is capable performing checks supporting broad coverage uses. A communication...
Smart grid technology is the next step to evolution of classical power grids, providing robustness, reliability, and security throughout network, enabling real-time management control. To achieve these goals, distributed computing (microgrid concept) intelligent control algorithms, tailored nature needs network under study, are necessary. deal with vast diversity being able capture dynamics any given create tools for analysis, apparatus testing, management, an automatic design framework...
Optimizing and predicting the energy consumption of industrial manufacturing can increase its cost efficiency. The interaction different aspects components is necessary. An overarching framework currently still missing, establishing such central research approach in this paper. This paper provides an overview current demands on industry from perspective digitalization sustainability. On basis developed fundamentals parameters, a superordinate proposed that allows modelling simulation...
SUMMARY An integrated sub‐1V voltage reference generator, designed in standard 90‐nm CMOS technology, is presented this paper. The proposed circuit consists of a conventional bandgap core based on the use p‐n‐p substrate vertical bipolar devices and voltage‐to‐current converter. former produces current with positive temperature coefficient (TC), whereas latter translates emitter‐base device to negative TC. includes two operational amplifiers rail‐to‐rail output stage for enabling stable...
Abstract A 1 V, programmable, accurate, high speed, single-ended charge pump is proposed, suitable for low voltage PLLs. It designed in TSMC 90-nm digital CMOS process and it consists of four switches a current steering configuration, unity gain rail to buffer the sharing effect elimination, one more amplifier minimizing DC mismatch, programmable bias circuitry two drivers based on standard cell XOR gates specific configuration achieving good synchronization between all input pulses at PLL...
An asynchronous A/D Converter architecture based on a binary tree structure is presented in this paper. Two alternative design strategies are that lead either to high mismatch immunity ADC requires light calibration logic (area: 0.123 mm2, power: 72 mW) or faster, tinier and even lower power 0.21 25 with needs slightly more complicated logic. Both require at least one two orders of magnitude area than any known approach remarkable low consumption without sacrificing speed. The designed can...
Effective management of chronic constrictive pulmonary conditions lies in proper and timely administration medication. As a series studies indicates, medication adherence can effectively be monitored by successfully identifying actions performed patients during inhaler usage. This study focuses on the recognition audio events usage pressurized metered dose inhalers (pMDI). Aiming at real-time performance, we investigate deep sparse coding techniques including convolutional filter pruning,...
In this work, we present a compact “adaptive downsampling” method that mitigates the nonlinearity problems associated with FPGA-based TDCs utilize delay lines. Additionally, generic allows for trade-offs between resolution, linearity, and resource utilization. Since is one of predominant issues regarding lines in TDCs, combined fact are utilized wide range TDC architectures (not limited to delay-line TDC), other implementations (e.g., Vernier or wave union TDCs), also different FPGA devices,...
Electricity price forecasting (EPF) has become an essential part of decision-making for energy companies to participate in power markets. As the mix becomes more uncertain and stochastic, this process also important industrial companies, as their production schedules are greatly impacted by costs. Although various approaches have been tested with varying degrees success, study focuses on predicting day-ahead market (DAM) prices different European markets how directly affects optimal...
Data-driven machine learning-based methods have provided immense capabilities, revolutionizing sectors like the Buildings-to-grid (B2G) integrated system. Since penetration rate of distributed energy resources increases towards a net-zero emissions power system, so does need for advanced services that ensure B2G-integrated system reliability. The convergence advancements in learning, computational at entire cloud-edge continuum, and large datasets from sensing devices enable development...
Current work evaluates the precision of low-cost medical sensors, which are incorporated in an e-health platform presented recently by authors. The sensors' accuracy is important issue that investigated this paper order to highlight cases where developed can be used a fairly reliable way. Specifically, sensor values obtained from were filtered using methods moving average window (MAW), Principal component analysis (PCA) and simplified Kalman filter. It shown although achieves significant...
The computation integrity of the cyber part an Industrial Cyber Physical System requires a reliable executable model underneath physical system. This system is usually continuous-time one and its execution resources far beyond existing embedded computing capabilities. need for capturing real time transient behavior imposes additional burden in CPS terms computational steps. In this work, we present that it feasible to emulate (the Distribution Energy Grid case) by direct mapping on hardware...
In this work, we present the design and implementation of an ultra-low latency Deep Reinforcement Learning (DRL) FPGA based accelerator for addressing hard real-time Mixed Integer Programming problems. The exhibits performance both training inference operations, enabled by training-inference parallelism, pipelined training, on-chip weights replay memory, multi-level replication-based parallelism DRL algorithmic modifications such as distribution over time. principles can be extended to...
A systematic methodology for mapping a class of iterative algorithms onto processor array architectures is presented. The concept the architecture combined efficiently with existing knowledge compiler techniques. It considered as an initial description algorithm Fortran-like nested loops, without requirement transforming it into any intermediate form such uniform recurrent equations. principles Lamport's coordinate method are used. Depending on systolic or non-systolic structure and/or...
In this paper we present the implementation of an experimental FDD, QPSK, millimeter-wave radio modem (57-64 GHz) for Point to (PtP) wireless backhaul applications. The transceiver supports GbE targeting a two-chip solution plus antenna subsystem, aiming at highly integrated functions in 90nm CMOS technology, range more than 1km. Achieving these levels overall integration and silicon requires many technological challenges innovative design approaches. Furthermore, it allows drastic changes...
The rapid evolution of smart assisted living operations in combination with the blooming commercial robots calls for use robotic based systems. Specifically, certain circumstances such as handling critical, contagious virus outbreaks like recent novel Coronavirus epidemic can be benefited by an assisting mobile robot system controlled remotely, complementing measures isolation patients from medical stuff. Within this context, robotic-based solution to employed needs easy deploy, able...
Summary A USB3.0 compatible transmitter and the linear equalizer of corresponding receiver are presented in this paper. The architecture circuit design techniques used to meet strict requirements overall link explored. Output voltage amplitude de‐emphasis levels programmable, whereas output impedance is calibrated 50Ω. programmable also with its main purpose being compensate for channel losses; employed together a DC offset compensation scheme. 6.25‐GHz provides 10 dB gain equalization...
We present a fully integrated differential distributed voltage-controlled oscillator implemented in 0.35-mum SiGe BiCMOS technology. The delay variation by positive feedback tuning technique, adopted from the ring oscillators, is demonstrated as fine-tuning alternative, which results to an approximately 420-MHz range. phase noise -98 dBc/Hz at 1-MHz offset 14.25-GHz carrier. An output buffer isolates measurement equipment. measured power -17.5 dBm and overall consumption of chip 138.1 mW...
This paper presents the algorithms and corresponding hardware architectures developed in context of nexgen miliwave project, that compose digital baseband processor a 60GHz point-to-point link. The provides all basic functionality required from transmitter receiver, including filtering, synchronization, equalization, error correction. techniques selected are capable compensating impairments due to millimeter-wave front-end yet support throughput rate more than one Gbp, with moderate cost. As...
The design and characterisation of a 60 GHz frequency quadrupler implemented in conventional 90 nm CMOS technology is presented. proposed fully differential formed by properly combining 15 to 30 doubler, two amplifiers, polyphase filter, doubler amplifiers. based on architecture achieves enhanced characteristics terms harmonics rejection, bandwidth, power consumption die area. Conversion loss 9.3 dBm at with 1.1 input achieved. 3 dB bandwidth lies between 51.5 61 GHz, while the total current...