Amir Babaie-Fishani

ORCID: 0000-0002-7425-5087
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About
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Research Areas
  • Analog and Mixed-Signal Circuit Design
  • Advancements in PLL and VCO Technologies
  • Radio Frequency Integrated Circuit Design
  • CCD and CMOS Imaging Sensors
  • Advanced Memory and Neural Computing
  • Advancements in Semiconductor Devices and Circuit Design
  • Neuroscience and Neural Engineering
  • Neural dynamics and brain function
  • Space Satellite Systems and Control
  • Analytical Chemistry and Sensors
  • Low-power high-performance VLSI design
  • Semiconductor materials and devices
  • Spacecraft Design and Technology
  • Electromagnetic Compatibility and Noise Suppression

Rode Kruis-Vlaanderen
2020

Ghent University
2013-2018

Eurogentec (Belgium)
2014

Abstract Objective. Decoding neural activity has been limited by the lack of tools available to record from large numbers neurons across multiple cortical regions simultaneously with high temporal fidelity. To this end, we developed Argo system at data rates. Approach. Here demonstrate a massively parallel recording based on platinum-iridium microwire electrode arrays bonded CMOS voltage amplifier array. The is highest channel count in vivo system, supporting simultaneous 65 536 channels,...

10.1088/1741-2552/abd0ce article EN Journal of Neural Engineering 2020-12-05

A very simple ring‐oscillator voltage‐controlled oscillator (VCO) structure for use in VCO‐ADC applications is presented. It has a greatly improved linearity compared with previously published VCOs. Measurement results of 1 V, 65 nm CMOS prototype confirm the effectiveness proposed approach.

10.1049/el.2015.3807 article EN Electronics Letters 2016-01-07

This paper presents the architectural concept and implementation of a mostly digital voltage-controlled oscillator-analog-to-digital converter (VCO-ADC) with third-order quantization noise shaping. The system is based on combination VCO counter. It shown how this can function as continuous-time integrator to form high-order sigma-delta modulator (CT-SDM). counter consists only building blocks, VCOs are implemented using ring oscillators, which also digital-friendly. No traditional analog...

10.1109/jssc.2017.2688364 article EN IEEE Journal of Solid-State Circuits 2017-04-14

Abstract Here we demonstrate the Argo System, a massively parallel neural recording system based on platinum-iridium microwire electrode arrays bonded to CMOS voltage amplifier array. The is highest channel count in vivo built date, supporting simultaneous from 65,536 channels, sampled at over 32 kHz and 12-bit resolution. This designed for cortical recordings, compatible with both penetrating surface microelectrodes. We have validated this by spiking activity 791 neurons rats Local Field...

10.1101/2020.07.17.209403 preprint EN cc-by-nc-nd bioRxiv (Cold Spring Harbor Laboratory) 2020-07-17

A novel approach to use a voltage‐controlled oscillator (VCO) as the first integrator of high‐order continuous‐time delta–sigma modulator (CT‐DSM) is presented. In proposed architecture, VCO combined with digital up–down counter implement CT‐DSM. Thus, digital‐friendly and hence can maximally benefit from technological scaling.

10.1049/el.2014.2719 article EN Electronics Letters 2014-12-27

This brief investigates the commonly used asynchronous sigma-delta modulator, which consists of a Schmitt trigger and continuous-time loop filter. A detailed analysis is presented to accurately predict distortion such modulators. The extracted expressions are compared with simulation results, they illustrate an excellent match. results also previous work by Roza, show drastic improvement in accuracy.

10.1109/tcsii.2013.2268352 article EN IEEE Transactions on Circuits & Systems II Express Briefs 2013-07-09

A very simple asynchronous sigma delta modulator design for linearisation of VCO ADC's is presented. The circuit only consists a passive feedback filter and Schmitt Trigger. By proper sizing, the non‐linearity error can be reduced to well below 0.12% input signals that go almost rail‐to‐rail. has been manufactured in low power version TSMC 65 nm technology was measured at 1 V supply.

10.1049/el.2016.0235 article EN Electronics Letters 2016-03-14

Recently nearly exact expressions for the distortion in a commonly used family of Pulse Width Modulators (PWMs) known as Asynchronous Sigma Delta (ASDMs) were presented. Such an ASDM consists feedback loop with schmitt-trigger (or comparator), and continuous time filter. However these previous results are not yet practically applicable because effect unavoidable delay (e.g. schmitt trigger) was taken into account. Therefore we now present more general theory that is also valid when there...

10.1109/iscas.2014.6865069 article EN 2022 IEEE International Symposium on Circuits and Systems (ISCAS) 2014-06-01

We present an offline calibration method to correct the non-linearity due DAC element mismatch in distributed feedback SigmaDelta-modulation A/D-converters. The improvement over previous methods is that not only first calibrated, but also DACs are coupled later stages can be calibrated as well. This needed case of Sigma Delta modulators with a low OSR, where contribution second should neglected. technique based on measurement two-tone input signal.

10.1109/iscas.2014.6865291 article EN 2022 IEEE International Symposium on Circuits and Systems (ISCAS) 2014-06-01

Recently an architecture for a nearly digital VCO ADC with high order quantization noise shaping was presented. Unfortunately, the structure is affected by non-linearity of first VCO. In this manuscript, we report experimental results potential solution problem: placing pulse width modulator (PWM) in front The work based on prototype VCO-ADC 3rd and 10 MHz bandwidth, implemented 65 nm CMOS technology. For small input signals circuit behaves as expected. Unfortunately larger signal levels...

10.1109/iscas.2018.8351694 article EN 2022 IEEE International Symposium on Circuits and Systems (ISCAS) 2018-05-01
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