A5051896075- Radio Frequency Integrated Circuit Design
- Advancements in PLL and VCO Technologies
- Analog and Mixed-Signal Circuit Design
- Advanced Memory and Neural Computing
- Acoustic Wave Resonator Technologies
- Photonic and Optical Devices
- CCD and CMOS Imaging Sensors
- Mental Health Research Topics
- Low-power high-performance VLSI design
- Face recognition and analysis
- Semiconductor Lasers and Optical Devices
- Electromagnetic Compatibility and Noise Suppression
- Ferroelectric and Negative Capacitance Devices
- Blind Source Separation Techniques
- Advanced Electrical Measurement Techniques
- Neuroscience and Neural Engineering
- Face and Expression Recognition
- Image and Video Stabilization
- Family Caregiving in Mental Illness
- Network Packet Processing and Optimization
- Advanced MEMS and NEMS Technologies
- Analytical Chemistry and Sensors
- Text and Document Classification Technologies
University of Michigan
2019-2023
Samsung (South Korea)
2020-2023
Korea Advanced Institute of Science and Technology
2013
As IoT is increasingly integrated into our everyday life, the demand for different sensor modalities, especially imaging, rising. imagers are often compact and have small form-factor batteries thus must be designed with both low power (improving battery life) high image quality (maximizing utility). Previously reported sensors [1, 2], along this work, adopt motion-detection (MD) triggering of full-array capture where MD performed on a heavily subsampled frame to enable continuous low-power...
We propose a low-power image sensor with motion-based triggering feature for the Internet of Things (IoT) applications. The supports near-pixel [within analog-to-digital converter (ADC)] motion-detection mode run on heavily subsampled frame (32 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\times $ </tex-math></inline-formula> 20 pixels, while consuming only 1.7 notation="LaTeX">$\mu \text{J}$ /frame) to...
This article presents a low jitter, power, reference spur LC oscillator-based oversampling digital phase locked loop (OSPLL). The proposed architecture simultaneously offers in-band noise, wide-bandwidth, and spur. In addition, this proposes an digitally controlled oscillator (DCO) for the OSPLL to achieve fast frequency update fine resolution, while its varactor switching timing is set optimally jitter using DCO tuning pulse control scheme. was fabricated in 28-nm CMOS process. integrated...
We propose a fully integrated low-power keyword spotting (KWS) system on chip (SoC) with content-adaptive frame subsampling, implemented in 28-nm CMOS technology. The is co-optimized from end-to-end including the analog frontend (AFE) and digital backend skip-recurrent neural network (RNN) KWS algorithm. SoC performs dynamic power gating based decision skip-RNN algorithm that allows opportunistic skipping to reduce consumption without compromising accuracy. design employs fast-stabilizing...
For chip-to-chip parallel interfaces, maintaining low power consumption while achieving high aggregate bandwidth is the key trend. Forwarded-clock (FC) architecture well suited to this trend because of simple structure and inherent correlation clock data jitter [1]. Clock-recovery circuits consume a large portion I/O power. PLL/DLLs with phase interpolator are widely used for recovery circuits. However, they dissipate jitter-tracking (JTB) (PLL) or (DLL), degrading between clock. Recently,...
An LC oscillator-based reference oversampling PLL (OSPLL) is proposed in this work. digitally controlled oscillator (DCO) with proportional path gain profile control and DCO tuning pulse timing scheme for optimal phase noise. Designed 28-nm CMOS process, the achieves 67.1-fs RMS-jitter 5.2-mW power consumption, which translates to -256-dB FoM. The in-band noise of -130 dBc/Hz at 4-GHz output frequency. spur -78 dBc.
This paper proposes a reference oversampling phase-locked loop that simultaneously suppresses in-band noise and oscillator while maintaining low spur. The proposed phase locked achieves -240.3 dB Figure of Merit (FOM) -80 dBc integrated jitter is 508 fsrms the power consumption 3.6 mW at 2 GHz output clock frequency.
This article describes an ultralow-power (ULP) temperature-compensated crystal oscillator (TCXO) with a pulsed-injection XO driver for IoT applications. Temperature compensation is achieved by changing the load capacitance ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${C}_{L}$ </tex-math></inline-formula> ) between two values using delta-sigma modulator notation="LaTeX">$\Delta \Sigma \text{M}$ ). The...
This paper presents an ultra-low power temperature-compensated crystal oscillator (TCXO) with a pulsed injection XO driver for IoT applications. Temperature compensation is achieved using single switched load capacitance, modulated by ∆ΣM. The ∆ΣM digitizes piece-wise linear (PWL) approximation of the temperature dependence where coarse 4-bit sensor selects PWL segment. proposed 32.768kHz TCXO achieves accuracy ±4.2ppm from -20℃ to 85℃ 3-point trimming and Allan deviation floor 34 ppb while...
본 논문에서는 실시간 폐쇄회로 화면으로 받은 컬러 이미지에서 얼굴영상을 추출하고 이미 지정된 특정인의 얼굴영상과 비교를 통해 지하철이나 은행 등 공공장소에서의 수배자 어떤 특정인을 검출하는 방법을 제안하고자 한다. 감시카메라의 특성상 화면속의 얼굴정보가 임의의 크기로 가변하고 영상 내에서 다수의 얼굴정보를 포함하고 있음을 가정할 때, 얼굴영역을 얼마나 정확하게 검색 할 수 있느냐에 초점을 맞추었다. 이를 해결하기 위하여F.Rosenblatt가 제안한 퍼셉트론 신경망 모델을 기초로 얼굴영상에 대한 <TEX>$20{\times}20$</TEX> 픽셀로 서브샘플링을 사용한 규준화 작업을 통해서 전면얼굴에서와 같은 인식기법의 효과를 사용하고, 획득한 얼굴후보 영역에 대하여 조명이나 빛에 의한 외부환경의 간섭을 최소화하기 위하여 최적선형필터와 히스토그램 평활화 기법을 이용하였다. 그리고 불필요한 학습을 달걀형 마스크의 덧셈연산을 전 처리 과정에 추가하였다. 과정을 마친 이미지는 각각...