Increased switching speeds of wide bandgap (WBG) semiconductors result in a significant magnitude the displacement currents through power module parasitic capacitances that are inherent packaging design. This is increasing concern, particularly case newly emerging medium-voltage (MV) SiC MOSFETs since can be several order higher due to fast transients and increased voltage magnitudes compared their Si counter parts. The severity intensifies when current becomes comparable fraction rated...

Recent developments within the field of medium voltage wide-bandgap semiconductor devices are drawing attention from both researchers and industries due to demanding requirements for more efficient high-power energy conversion. The rapid development has entailed an increased awareness negative impact rate change in voltage, d <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">v</i> /d xmlns:xlink="http://www.w3.org/1999/xlink">t</i> , its...

This article proposes a general physics-based model for identifying the parasitic capacitance in medium-voltage (MV) filter inductors, which can provide analytical calculations without using empirical equations and is not restricted by geometrical structures of inductors. The elementary capacitances MV inductor are identified, then equivalent between two terminals derived under different voltage potential on core. Further, three-terminal circuit, instead conventional two-terminal proposed...

This paper investigates gate driver design challenges encountered due to the fast switching transients in medium voltage half bridge silicon carbide MOSFET power modules. The presents, of a reduced isolation capacitance regulated DC-DC supply and with an active Miller clamp circuit for 10 kV SiC module. Designed are verified double pulse test setup continuous operation using An in-depth experimental verification detailed results presented validate functionality. designed shows satisfactory...

The benefits of emerging wide-band gap semiconductors can only be utilized if the semiconductor is properly packaged. Capacitive coupling in package causes electromagnetic interference during high dv/dt switching. This paper investigates current flowing parasitic capacitance between output node and grounded heat sink for a custom silicon carbide power module. A circuit model capacitive path presented, using capacitances extracted from ANSYS Q3D. Simulated values are compared with...

Medium voltage 10 kV Silicon Carbide MOSFETs, introduce challenges regarding converter design. Very high rate of change and capacitive couplings to for example cooling systems cause increased electromagnetic interference. The aim this paper is accurately model the coupling a heat sink experimentally validate model. An analytic developed which demonstrated be in excellent agreement with experimental results. result validates modelled network allowing engineers choose suitable grounding...

This article rethinks the basic assumptions often used in analytically modeling parasitic capacitance inductors. These are classified two commonly-used physics-based analysis methods: lumped capacitor network method and energy conservation method. The lumped-capacitor is not proper solution for calculating equivalent inductors at first resonant frequency, but rather represents above last frequency. energy-conservation based shown to be more accurate a reasonable model Multiple case studies...

This paper presents a 10 kV SiC MOSFET based power stack, featuring medium voltage conversion with simple two-level source converter topology. The design of the (MV) stack is realized in commercial IGBT three phase frame. assembly comprises custom packaged single-chip half bridge modules, gate driver units very low isolation capacitance, DC-link capacitors, busbar and liquid cooled heatsink. designed stacks are tested DC-fed back-to-back setup total circulated 42 kVA, 6 kV, rms load current...

In the hardware design of battery energy storage system (BESS) interface, in order to meet high-voltage requirement grid side, integrating 10-kV silicon-carbide (SiC) MOSFET into interface could simplify topology by reducing component count. However, conventional gate driver is challenging and inextensible BESS, since rating high dv/dt bring requirements isolation low common-mode capacitance. Therefore, this article, a scalable converter-based self-powered (SCS) further proposed. A 5-kV...

This letter proposes a behavioral model for analyzing the ground current in medium-voltage (MV) inductors. The impedance between terminals and connection of inductors is measured by analyzer, which capacitive at low frequency. In order to characterize this impedance, multistage paralleled RLC circuit proposed. An analytical method further developed calculate parameters proposed equivalent circuit, enables predict time-domain response MV A digital twin double-pulse-test setup LTspice, where...

This article characterizes three parasitic capacitances in copper-foiled medium-voltage inductors. It is found that the conventional modeling method overlooks effect of fringe field, which leads to inaccurate To address this problem, contributed by electrical field identified first, and a physics-based analytical for proposed, avoids using any empirical equations. The total are then derived different cases with core potentials, from three-terminal equivalent circuit derived, thus, inductors...

The analytical modeling of parasitic capacitances in inductors is commonly based on the energy-conservation law. Yet, order to calculate equivalent inductors, floating voltage potential magnetic core required be preknown all previous methods. This letter proposes an method for calculating with low-resistivity cores, which does not require any prior knowledge potential. proposed can extended transformers as well multiterminal devices. experimental results verify effectiveness method.

It is commonly assumed that power semiconductor switching losses are the same for high-side and low-side devices in a half-bridge module. However, this paper reveal SiC MOSFET medium voltage module exhibits over 40 % higher energy compared to MOSFET. The loss imbalance attributed parasitic gate capacitance module, which contributes equivalent Miller capacitance. A physics-based dissipation model therefore proposed, distinguishing between dissipation. Double pulse testing demonstrates...

This paper proposes a physics-level modeling method for analyzing the primary to secondary-side (common-mode) parasitic capacitance of transformer Medium-voltage SiC MOSFETs gate drivers. The lumped circuit-based physics-model turn-to-turn capacitance, turn-to-core and self core are derived, it is found that mainly contributes total equivalent common-mode capacitance. measured impedance shows high agreements with calculated value, where accuracy proposed can be proved based on experimental results.

Advances in high breakdown voltage SiC MOSFETs allows design of medium power modules with simpler topologies, however, dv/dt addition to di/dt makes parasitics more important consider loss estimations. Correct estimations can help prevent costly and time-consuming problems a process. Data sheet values be used directly for estimation, but detailed approaches using device-level SPICE model fitting inclusion module will give estimation may predict transient behavior at cost increased...

In high-power medium-voltage applications, inductors usually have multiple windings on a single core, due to the high inductance value and current stress. The coils are electronically connected in either series or parallel, with considerations of loss cost. However, differences parasitic capacitance using parallel connections not discussed. Therefore, this article reveals that comparison for windings, utilizing connection winding can significantly reduce multiwindings without sacrificing...

This paper presents a 500 kVA DC-fed regenerative power circulation platform to evaluate newly emerging Silicon Carbide (SiC) MOSFETs based medium voltage (MV, 4160 V) Power Electronic Converter (PEC) against commercially available (Si) IGBT low (LV, 690 PEC allowing for comparative performance evaluation. Each level have AC/DC and DC/AC conversion stages testing of two MV LV PECs simultaneously. The interface between levels is facilitated by line frequency transformer mechanically coupled...

The auxiliary power supply with high voltage isolation and low common-mode capacitance is one of the critical components inside medium-voltage electronic converters. transformer design often ends up having a leakage inductance as consequence requirement imposed by switching slew rate <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$(\mathbf{d}\boldsymbol{v}/\mathbf{d}\boldsymbol{t})$</tex> . In case series resonant converter this can be...

New semiconductor devices based on wide bandgap materials are emerging in medium voltage power electronic converter applications, presenting new opportunities to the industry relying devices. SiC MOSFETs with blocking voltages of 10 kV (and above) is a promising technology, however, their fast switching transitions result increased output slew rate (dv/dt), which poses challenges applicability MOSFET technology. This paper examines impact dv/dt an off-the-shelf closed loop hall-effect...

Capacitive parasitic couplings in power electronics systems are gaining increased attention due to the emergence of wide bandgap devices, with main challenges being faster switching speeds and operating voltage capabilities causing slew rate (dv/dt). The high dv/dt induces capacitive displacement currents through channel semiconductor effectively reducing speed, resulting an increase Volt-Ampere integral, incurring surplus energy dissipation. This paper highlights that module gate side...

The isolated gate-driver power supply is one of the crucial components inside medium-voltage (MV) converter, which provides galvanic isolation featuring low common-mode (CM) capacitance and high dv/dt immunity. Therefore, design transformer needs to be customized. However, none known papers have proposed a convenient assembly method. For this purpose, an easy-to-manufactured planar for MV in paper. designed has been tested at 7 kV DC voltage measured CM 0.628 pF. Thus, capability...

This paper analyzes the phenomenon of ground current in filter inductors (with a grounded core/frame) medium-voltage (MV) SiC-MOSFET-based. The inductor is generated during switching transients, due to capacitive coupling between winding and core/frame. A general three-terminal equivalent circuit proposed for representing couplings inductors, which allows extraction admittances terminals by using system identification tool, thus can be accurately simulated frequency range concern (up 100 MHz...

Previous research reports that the parasitic capacitance of filter inductors can result in larger capacitive currents and cause increased losses transistors. However, previous only discussed with floating cores frames, where high-power medium to high-voltage are practically required have grounded frames according standards. To fill gap, this paper aims provide a comprehensive analysis extra switching caused by frames. Using 10 kV SiC MOSFETs an accurate digital model double-pulse-test (DPT)...

Input-series systems are prevalent for industrial applications satisfying the high input-voltage requirement. In addition to their topology and modulation design, auxiliary power supply (APS) design powering controlling system is also significant safety reliability. general, internal APS preferred facilitating modular easing common mode noise insulation problems, which in meantime brings about startup problem of submodules practice. For input-series with large submodule capacitances, voltage...