- Advancements in Semiconductor Devices and Circuit Design
- Low-power high-performance VLSI design
- Semiconductor materials and devices
- Quantum and electron transport phenomena
- Carbon Nanotubes in Composites
- Quantum-Dot Cellular Automata
- Graphene research and applications
- IoT and GPS-based Vehicle Safety Systems
- Analog and Mixed-Signal Circuit Design
- Parallel Computing and Optimization Techniques
- Advanced Memory and Neural Computing
- Context-Aware Activity Recognition Systems
- Electromagnetic Compatibility and Noise Suppression
- IoT-based Smart Home Systems
- Nanowire Synthesis and Applications
- Semiconductor Quantum Structures and Devices
- Non-Invasive Vital Sign Monitoring
- Advancements in PLL and VCO Technologies
- VLSI and FPGA Design Techniques
- Wireless Body Area Networks
- ECG Monitoring and Analysis
- Neuroscience and Neural Engineering
- Semiconductor materials and interfaces
- Radiation Effects in Electronics
- Sensor Technology and Measurement Systems
Dhirubhai Ambani Institute of Information and Communication Technology
2017-2024
Embedded Systems (United States)
2022-2023
Planet
2021
Cadence Design Systems (United States)
2018
Université de Sherbrooke
2012-2014
Indian Institute of Technology Bombay
2014
The emerging VLSI technology and simultaneously highly dense packaging of devices interconnects in nano-scale chips have prosperously enabled realization system-on-chip designs advanced high-performance computing applications. Concurrently, these aggravated inevitable challenges miniaturized integrated circuits (ICs). One the main limiters performance high-speed is on-chip interconnects. graphene based mixed carbon nanotube bundle (MCNTB) been investigated as one most suited physically...
Single-electron transistor (SET) circuits can be stacked above the CMOS platform to achieve functional and heterogeneous 3-D integration of nanoelectronic devices. For SET-CMOS hybridization, technology is essential for I/O, signal restoration, maintaining compatibility with established technology. In spite SET's unparalleled advantages, its low current drive output voltage when driving logic makes use questionable in commercial ICs, specifically at interface. this paper, we contribute...
The driving capability of a single-electron transistor (SET) circuit is sensitive to the load and interconnects. We discuss about improving performance SET logic in hybrid SET-CMOS by parameter variation architecture along with its simulation results. With an intention studying drivability SET-only circuit, we examined composed 2^1^3 inverters interconnect effect 3-D CMOS IC. schematic based on fabrication model this large interlayer coupling capacitances metallization. results for delay,...
Hand based gestures are words of communication for people impaired speech and hearing. This results in mismatch between such a normal one. A deaf dumb person many times finds difficulty informing about basic phrases or representing certain actions like "How you?", "Yes", etc. to human. To tackle this issue, one hand gesture recognition system is presented which uses sensor microcontroller capture movement the form signal. 1D Convolutional Neural Network (1D-CNN) can extract feature directly...
One of the important and vital roles in a country's defense is played by army soldiers. Every year Soldiers get strayed or injured it time consuming to do search rescue operations. In this paper, we present WSN-based environmental health monitoring approach which sensor data processed using robust stable algorithm implemented controller. These are then sent base station via low-cost, low- power secure communication links provided LoRa network infrastructure instead cellular networks, since,...
This paper presents an Application-Specific Integrated Circuit (ASIC) implementation suitable for healthcare applications that employ RISC-V as a digital processing unit and sensor interfacing circuits. Systems on Chip (SoC) are used monitoring tools well-being or precautionary. Healthcare system with ultra-low-power System architecture specifically wearable systems, in order to reduce the power consumption of processor, designing ASIC handles signal provides computation. The design consists...
This paper presents a comparative study of one-bit-full-adder cell based on metallic complementary capacitively coupled single-electron transistors with its 22 nm CMOS counterpart. Performance and energy efficiency are investigated. The CMOS-like transistor full adder is used in two operating mode, hysteresis non-hysteresis. Parallel serial single electron designs introduced. inverter consumes less than 90.4 pW while it dissipates 4.21 nW technology.
In VLSI integrated circuits, devices and interconnects are the steady pillars for designing realization of entire system. Demand ultra-low power requirements has become very essential in today’s modern portable miniaturized electronic gadgets. The subthreshold modelling its utility gadgets low applications have increased tremendously recent days. Operating region profoundly enhance performance this paper, contemporary been energetically taken. novel device on-chip first time presented using...
In today's era, need of efficient accident detection has drawn much attention as number accidents are increasing day by day. One the widely employed method is to use accelerometer detect a crash. this method, acceleration (g) value measured from calibrated an accident. This however limited accuracy accelerometer. To make system, convolutional neural network (CNN) methodology can be incorporated in system. CNN state-of-the-art for image classification. recent work, classification been used...
Heterogeneous 3D integration of single electron transistor (SET) circuits with CMOS based is achieved by stacking a SET layer above IC. Low power and delay efficient can be designed using SET. In this paper, we have simulated 6T SRAM array operating at room temperature comparable voltage. Peripheral circuit like sense amplifier, decoder, write pre-charge been for optimum performance. The stability cell verified N-curve method. 8 x bit 99.54 % efficient, 92.19 faster in access time 78.58 read...
In this paper, the implementation of Baugh-Wooley multiplier for 8-bit signed multiplication is performed from RTL to GDSII generation incorporate physical design (PD) flow. Firstly, file generated using Verilog an and used while going through PD For flow open-source EDA tools are different intermediate levels such as synthesis, placement, routing, timing analysis. Profuse results like power, area, constraints, layout, frequency incorporated compared between two technology nodes: 180 nm 45...
At nanometer technology nodes, the efficient signal integrity and performance assessment of vast on-chip interconnects are crucial challenging. For a long time, copper (Cu) has been used as an interconnect material in integrated circuits (ICs). However, heading towards lower Cu is becoming inadequate to satisfy requirements for high-speed applications due its physical limitations. To mitigate this issue, multiwall carbon nanotube bundle (MWCNTB) proven be better replacement Cu. Hence,...
Graphene has become as one of the prospective on-chip VLSI interconnect materials due to its several superior electrical and mechanical properties. derived multi-layer graphene nanoribbon (MLGNR) been investigated aptly suited interconnects. Long MLGNR interconnects are prone various non-ideal effects such signal degradation crosstalk. The performance system deteriorates significantly length increases. To mitigate this graving issue, novel buffer insertion technique for long systematically...
The arithmetic logic unit (ALU) is one of the most essential components any microprocessor or computing system that capable performing several as well operations. For realizing efficient and high-performance ALU, proper designing, optimum selection materials incorporation advanced devices are utmost important. single electron transistor (SET) a prominent device structure for achieving high-end system. In this paper, prospective SET-based ALU realized to meet next-generation requirements like...
Face detection deals with the specified object(face) within given database. Several algorithms have been de-fined by different researchers for face recognition. Research, technology advancement and applications incorporating recognition over last few decades grown enormously. It is growing as one of profound exciting research fields. Some practical efficient are Principal Component Analysis (PCA), Artificial Neural Network (ANN), Support Vector Machine (SVM), Feature based approach, Gabor...
Electronics is becoming an indispensable part of vehicular technology. With the advancement in technology, on-board diagnostics (OBD) emission checks are included inspection and maintenance (I/M) program for light motor vehicles (LMV). The present work introduces a remote OBD based test LMV using android application. This application communicates with port vehicle ELM 327 scanner. It scans identification number (VIN), performs checks, updates report to google sheet. Further, apps script...
A microprocessor or a computing system is general purpose device which works on the user defined instructions. The simulation of requires complex stimuli to verify design. It needs initialization and configuration memory for required instructions their execution. Single Electron Transistors based can be designed using Cadence Virtuoso environment. traditional method design verification simulate by applying inputs through multiple signal sources. Using this approach, tedious complicated....
Over the past several decades, performance of existing complementary metal oxide semiconductor (CMOS) technology has been improved by scaling CMOS transistors size. However, nanometre scale CMOS-based designs is limited due to short-channel effect and process variation. The single electron transistor (SET) a promising advanced device that can mitigate these grave issues. In this study, novel SET-based computing system designed simulated at supply voltage 0.8 V, so it be 3D integrated with...
In this paper, performance analysis of carbon nanotube field-effect transistors (CNTFET) and graphene nano-ribbon (GNRFET) is done based on transfer characteristics, cut-off frequency, total charge, intrinsic delay, transconductance by varying parameters such as temperature, oxide thickness, channel length. After thorough investigation, it was inferred that gate-all- around CNTFET (GAA-CNTFET) double-gate GNRFET (DG-GNRFET) had a better compared to back-gate (BG-CNTFET) (BG-GNRFET). It's...
With the constant advancements in automotive industry and increase traffic volume, chances of fatality road accidents have increased. This poses a dire need to develop good reliable solution reduce fatalities. One way achieve this goal is build system that detects notifies medical services as soon possible. The aim research paper provide robust accident detection notification where data collected from site communicated an emergency service provider well victim's contacts such family members...