Akira Fujimaki

ORCID: 0000-0003-0315-9714
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About
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Research Areas
  • Physics of Superconductivity and Magnetism
  • Quantum and electron transport phenomena
  • Advancements in Semiconductor Devices and Circuit Design
  • Semiconductor materials and devices
  • Magnetic properties of thin films
  • Superconducting Materials and Applications
  • Magnetic and transport properties of perovskites and related materials
  • Advanced Electrical Measurement Techniques
  • Semiconductor Quantum Structures and Devices
  • Superconducting and THz Device Technology
  • Superconductivity in MgB2 and Alloys
  • Quantum Computing Algorithms and Architecture
  • Surface and Thin Film Phenomena
  • Particle accelerators and beam dynamics
  • Iron-based superconductors research
  • Magneto-Optical Properties and Applications
  • Atomic and Subatomic Physics Research
  • Metal and Thin Film Mechanics
  • Parallel Computing and Optimization Techniques
  • Silicon Carbide Semiconductor Technologies
  • Electronic and Structural Properties of Oxides
  • Low-power high-performance VLSI design
  • HVDC Systems and Fault Protection
  • Radio Frequency Integrated Circuit Design
  • Quantum Information and Cryptography

Nagoya University
2016-2025

National Academy of Engineering
2023

Siemens (Germany)
2023

University of California, Berkeley
2023

Karlsruhe Institute of Technology
2023

Osaka Prefecture University
2015

Kyoto University
2015

TOBB University of Economics and Technology
2015

National Institute of Advanced Industrial Science and Technology
2014

Centre for Research in Engineering Surface Technology
2012

We describe the recent progress on a Nb nine-layer fabrication process for large-scale single flux quantum (SFQ) circuits. A device fabricated in this is composed of an active layer including Josephson junctions (JJ) at top, passive transmission line (PTL) layers middle, and DC power bottom. conditions equipment. use both diagnostic chips shift register (SR) to improve process. The chip was designed evaluate characteristics basic elements such as junctions, contacts, resisters, wiring,...

10.1587/transele.e97.c.132 article EN IEICE Transactions on Electronics 2014-01-01

We demonstrate rapid single-flux-quantum (RSFQ) circuits with reduced energy consumption by lowering the driving voltages and critical currents of Josephson junctions (JJs). At lowered voltages, statically consumed bias resistors (which is dominant in RSFQ circuits) reduced. In addition, we show that when are driven constant dynamic resulting from switching JJs because suppression amplitudes signal voltage pulses, even though speed becomes slower. Utilization miniaturized smaller also leads...

10.1143/jjap.51.053102 article EN Japanese Journal of Applied Physics 2012-05-01

A pipelined 8-bit-serial single-flux-quantum (SFQ) microprocessor, called CORE1 , was designed and tested.The has two cascaded arithmetic logic units (ALUs) based on forwarding architecture, which can perform register operations from one instruction.Pipelining is also extensively adopted to enhance the performance.A new design method, known as one-hot encoding, been introduced into of control circuit.The 4-stage-pipelined SFQ microprocessors, 8, have implemented using CONNECT cell library...

10.1109/tasc.2007.898606 article EN IEEE Transactions on Applied Superconductivity 2007-06-01

We present a design of an 8-bit bit-serial rapid single-flux-quantum (RSFQ) microprocessor, which is called CORE e4, and its high-speed functionality test results. The e4 equipped with four general-purpose registers can execute 20 different instructions. first version the e4v1, has been implemented using National Institute Advanced Industrial Science Technology (AIST) 10-kA/cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> advanced...

10.1109/tasc.2016.2565609 article EN IEEE Transactions on Applied Superconductivity 2016-05-10

We demonstrate rapid single-flux-quantum (RSFQ) circuits with reduced energy consumption by lowering the driving voltages and critical currents of Josephson junctions (JJs). At lowered voltages, statically consumed bias resistors (which is dominant in RSFQ circuits) reduced. In addition, we show that when are driven constant dynamic resulting from switching JJs because suppression amplitudes signal voltage pulses, even though speed becomes slower. Utilization miniaturized smaller also leads...

10.7567/jjap.51.053102 article EN Japanese Journal of Applied Physics 2012-05-01

We describe the development of single-flux-quantum (SFQ) microprocessors and related technologies such as designing, circuit architecture, microarchitecture, etc. Since studied here aim for a general-purpose computing system, we employ complexity-reduced (CORE) architecture in which high-speed nature SFQ circuits is used not increasing processor performance but reducing complexity. The bit-serial processing most suitable way to realize CORE architecture. assembled all best concerning...

10.1093/ietele/e91-c.3.342 article EN IEICE Transactions on Electronics 2008-03-01

A single flux quantum (SFQ) logic cell library has been developed for the 10kA/cm2 Nb multi-layer fabrication process to efficiently design large-scale SFQ digital circuits. In new library, critical current density of Josephson junctions is increased from 2.5kA/cm2 compared our conventional and McCumber-Stwart parameter each junction 2 in order increase circuit operation speed. More than 300 cells have designed, including fundamental wiring passive interconnects. We measured all confirmed...

10.1587/transele.e93.c.440 article EN IEICE Transactions on Electronics 2010-01-01

We present design and experimental results of a rapid single-flux-quantum (RSFQ) bit-serial microprocessor with reduced-size embedded random access memories (RAMs) minimal instruction set, called CORE e2h. The microprocessors e series have been developed for demonstrating small-scale program execution, such as loop calculation sorting, in order to show the first prototype stored-program computer using RSFQ technology. e2h is most simplified variation series, which equipped only two...

10.1109/tasc.2016.2642049 article EN IEEE Transactions on Applied Superconductivity 2016-12-20

A 4-bit bit-slice arithmetic logic unit (ALU) for 32-bit rapid single-flux-quantum microprocessors was demonstrated. The proposed ALU covers all of the operations MIPS32 instruction set. It processes bit-sliced data that are divided into eight slices 4 bits. approach simplifies circuit structure and reduces hardware cost. uses synchronous concurrent-flow clocking consists pipeline stages. implemented using 1.0-μm Nb/AlO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML"...

10.1109/tasc.2015.2507125 article EN IEEE Transactions on Applied Superconductivity 2015-12-10

We report successful operations of low-energy consumption rapid single-flux-quantum (RSFQ) circuits applying lowered driving voltages, called LV-RSFQ, using different fabrication processes. In the we feed bias currents to Josephson junctions from constant voltages (less than 1 mV) through small resistors without extra inductors. Both static and dynamic energy are reduced because suppression amplitudes SFQ pulses, in exchange for slower switching speed. show that speed LV-RSFQ is improved by...

10.1109/tasc.2013.2240555 article EN IEEE Transactions on Applied Superconductivity 2013-01-15

A multiplier based on superconductor single-flux-quantum (SFQ) logic is demonstrated up to 48GHz with the measured power consumption of 5.6 mW. The performs 8 × 8-bit signed multiplication every clock cycle. design a bit-parallel, gate-level-pipelined structure that exploits ultimately high-throughput performance SFQ logic. test chip fabricated using 1.0-μm, 9-layer process consists 20,251 Nb/AlOx/Nb Josephson junctions (JJs). correctness operation verified by on-chip high-speed testing.

10.1109/isscc.2019.8662351 article EN 2022 IEEE International Solid- State Circuits Conference (ISSCC) 2019-02-01

We successfully demonstrated an 8-bit-wide, bit-parallel datapath composed of arithmetic logic unit and register files for high-throughput oriented SFQ microprocessors based on a gate-level-pipeline structure. Achieving high-speed operation in the is difficult because feedback paths. used concurrent-flow clocking counter-flow combination to solve timing problem at path datapath, we optimized number JJs pipeline stages file solving issue. designed with cell library AIST 10 kA/cm...

10.1109/tasc.2021.3061353 article EN IEEE Transactions on Applied Superconductivity 2021-02-23

Single-flux quantum logic (SFQ) circuits, in which a flux is used as an information carrier, have the possibility for opening door to new digital system operated at over 100-GHz clock frequency extremely low power dissipation. The SFQ so-called pulse logic, completely different from level semiconductors like CMOS, so circuit design technologies circuits be newly developed. Recently, much progress basic designing and operating high speeds has been made. With advances these tools, large-scale...

10.1109/jproc.2004.833658 article EN Proceedings of the IEEE 2004-09-20

We have successfully demonstrated an 8-bit microprocessor using passive transmission lines based on single-flux-quantum LSI technology. In the designed here, called CORE1/spl alpha/6, a simple bit-serial architecture with seven instructions was employed. floor plan consideration toward integration of memory, and superconductive (PTLs) were used to connect circuit blocks. Utilization PTLs helped us reduce propagation delay in long interconnections. The design flexibility enhanced performance...

10.1109/tasc.2005.849860 article EN IEEE Transactions on Applied Superconductivity 2005-06-01

We present hybridization of Josephson, CMOS, and nanocryotron (nTron) devices for a large-scale cryogenic memory application. The system proposed here is dynamic random access composed address decoders based on an energy-efficient rapid single-flux-quantum logic, nTron line drivers, CMOS cell array, Josephson current sensors. Because drivers with voltage amplification are the major causes power dissipation in conventional Josephson-CMOS hybrid memory, drastic reduction consumption expected....

10.1109/tasc.2016.2646929 article EN IEEE Transactions on Applied Superconductivity 2016-12-30

We present a concept of an advanced rapid single-flux-quantum (RSFQ) logic circuit family using the combination 0-shifted and π-shifted Josephson junctions. A π-shift in current-phase relationship can be obtained several types junctions, such as junctions containing ferromagnet barrier layer, depending on its thickness temperature. use superconducting quantum interference devices composed pair 0- (0-π SQUIDs) basic element. Unlike conventional RSFQ logic, bistability is by spontaneous...

10.1587/transele.e101.c.385 article EN IEICE Transactions on Electronics 2018-04-30

A Single-Flux-Quantum (SFQ) 4-bit throughput-oriented processor has successfully been demonstrated at up to 32 GHz with the measured power consumption of 6.5 mW. This is first implementation gate-level-pipelined processor, and it achieves 2.5 Tera-Operations Per Watt (TOPS/W) by circuit architectural optimizations.

10.1109/vlsicircuits18222.2020.9162826 article EN 2020-06-01

The complete operation of a microprocessor prototype based on the single-flux-quantum (SFQ) logic is described. 8b SFQ microprocessor, fabricated using niobium Josephson-junction technology, performs computation at 15.2GHz clock rate with power consumption 1.6mW. /spl mu/P contains 5000 Josephson junctions and 1300 cells 5mm/sup 2/ IC.

10.1109/isscc.2004.1332714 article EN 2004-09-28

We propose a desk-side supercomputer with large-scale reconfigurable data-paths (LSRDPs) using superconducting rapid single-flux-quantum (RSFQ) circuits. It has several sets of computing unit which consists general-purpose microprocessor, an LSRDP and memory. An lot of, e. g., few thousand, floating-point units (FPUs) operand routing networks (ORNs) connect the FPUs. reconfigure to fit computation, i. e., group operations, appears in ‘for’ loop numerical programs by setting route ORNs before...

10.1093/ietele/e91-c.3.350 article EN IEICE Transactions on Electronics 2008-03-01

We describe a large-scale integrated circuit (LSI) design of rapid single-flux-quantum (RSFQ) circuits and demonstrate several reconfigurable data-path (RDP) processor prototypes based on the ISTEC Advanced Process (ADP2). The ADP2 LSIs are made up nine Nb layers Nb/AlOx/Nb Josephson junctions with critical current density 10kA/cm2, allowing higher operating frequencies integration. To realize truly RSFQ circuits, careful is necessary, compromises in device structure, logic gates,...

10.1587/transele.e97.c.157 article EN IEICE Transactions on Electronics 2014-01-01
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