A5033705444- GaN-based semiconductor devices and materials
- Semiconductor materials and devices
- Ga2O3 and related materials
- Silicon Carbide Semiconductor Technologies
- Advancements in Semiconductor Devices and Circuit Design
- ZnO doping and properties
- Semiconductor Quantum Structures and Devices
- Semiconductor materials and interfaces
- Metamaterials and Metasurfaces Applications
- Underwater Vehicles and Communication Systems
- Indoor and Outdoor Localization Technologies
- Robotics and Sensor-Based Localization
- Radio Frequency Integrated Circuit Design
- Microwave Engineering and Waveguides
- Plasma and Flow Control in Aerodynamics
- Real-time simulation and control systems
- Silicon and Solar Cell Technologies
- Radiation Effects in Electronics
- Superconducting and THz Device Technology
Hong Kong University of Science and Technology
2013-2020
University of Hong Kong
2013-2020
National University of Defense Technology
2018
In this letter, 600-V normally-OFF <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">${\rm SiN}_{x}$</tex></formula> /AlGaN/GaN metal–insulator–semiconductor high-electron-mobility transistor (MIS-HEMT) is reported. Normally-OFF operation and low OFF-state gate leakage are obtained by using fluorine plasma ion implantation in conjunction with the adoption of a 17-nm thin film grown plasma-enhanced...
We report an in situ low-damage pre-gate treatment technology atomic layer deposition (ALD) system prior to the ALD- <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">${\rm Al}_{2}{\rm O}_{3}$</tex></formula> deposition, realize high-quality O}_{3}/{\rm III}\hbox{-}{\rm nitride}$</tex></formula> (III-N) interface. The effectively removes poor quality native oxide on III-N surface while forming ultrathin...
A low on-resistance normally-off GaN double-channel metal–oxide–semiconductor high-electron-mobility transistor (DC-MOS-HEMT) is proposed and demonstrated in this letter, which features a 1.5-nm AlN insertion layer (ISL) located 6 nm below the conventional barrier/GaN interface, forming second channel at interface between AlN-ISL underlying GaN. With gate recess terminated upper channel, operation was obtained with <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML"...
Effective interface trap characterization approaches are indispensable in the development of gate stack and dielectric surface passivation technologies III-nitride (III-N) insulated-gate power switching transistors for enhanced stability dynamic performance. In III-N metal-insulator-semiconductor high-electron-mobility (MIS-HEMTs) that feature a buried channel, polarized barrier layer separates critical dielectric/III-N from two-dimensional electron gas (2DEG) channel consequently...
Abstract The threshold voltage ( V T ) instability of metal‐insulator‐semiconductor high electron mobility transistors (MIS‐HEMTs) is investigated. In the enhancement‐mode AlGaN/GaN MIS‐HEMT fabricated by fluorine plasma implantation technique featuring Al 2 O 3 gate dielectric, a hysteresis 0.6 in transfer characteristics observed quasi‐static I ‐ (current‐voltage) measurement, which bias swept at low rate (0.7 V/s). Pulsed however, unveils much larger under same swing. ‐instability...
With an in situ low-damage NH <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</inf> -Ar-N xmlns:xlink="http://www.w3.org/1999/xlink">2</inf> plasma pre-gate treatment, a high-quality Al O /GaN-cap interface has been obtained the /GaN/AlGaN/GaN MIS-structures. Frequency- and temperature-dependent C-V characterization techniques were developed to map trap density (D xmlns:xlink="http://www.w3.org/1999/xlink">it</inf> ) at dielectric/III-nitride...
We demonstrate high-voltage depletion-mode and enhancement-mode (E-mode) AlGaN/GaN high-electron-mobility transistors (HEMTs) on a GaN-on-silicon-on-insulator (SOI) platform. The GaN-on-SOI wafer features GaN epilayers grown by metal-organic chemical vapor deposition p-type (111) Si SOI substrate with (100) handle wafer. Micro-Raman spectroscopy significantly reveals reduced stress in the epilayers, which is result expected from compliant substrate. E-mode HEMTs fabricated fluorine plasma...
An enhancement-mode GaN double-channel MOS-HEMT (DC-MOS-HEMT) was fabricated on a heterostructure, which features 1.5-nm AlN layer (AlN-ISL) inserted 6 nm below the conventional barrier/GaN hetero-interface, forming lower channel at interface between AlN-ISL and underlying GaN. With gate recess terminated upper layer, positive threshold voltage is obtained, while retains its high 2DEG mobility as heterojunction preserved. The device delivers small on-resistance, large current, breakdown...
Abstract Effective interface engineering techniques in III‐nitride heterojunction power devices, aiming at yielding high V TH stability insulated‐gate devices and suppressed current collapse high‐voltage switching operation, are of critical significance to enhance device performance reliability. In this work, we present an enhancement technology featuring situ low‐damage NH 3 /Ar/N 2 pre‐gate plasma treatment prior the ALD‐Al O deposition for high‐performance MIS‐HEMTs. It is manifest that...
Very fast transients of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$V_{ {\text {TH}}}$ </tex-math></inline-formula> shift and their impact on notation="LaTeX">$R_{\mathrm{\scriptscriptstyle ON}}$ under dynamic AC (1 k–1 MHz) positive gate stress in depletion-mode (D-mode) metal–insulator–semiconductor high-electron-mobility transistors (MIS-HEMTs) are revealed. We achieve data acquisition within 120 ns...
A high-temperature (180 °C) gate recess technique featuring low damage and in-situ self-clean capability, in combination with O <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</inf> -assisted atomic-layer-deposition (ALD) of Al xmlns:xlink="http://www.w3.org/1999/xlink">2</inf> dielectric, is developed for fabrication high performance normally-off AlGaN/GaN metal-insulator-semiconductor high-electron-mobility transistors (MIS-HEMTs), which...
In this letter, we demonstrate an integrated process that illustrates the compatibility of AlN/SiNx passivation with high-performance (i.e. low leakage and high breakdown) low-pressure chemical vapor deposition (LPCVD) SiN <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">x</sub> gate dielectric for GaN-based MIS-HEMT. It is shown structure maintains its superior capability suppressing current collapse after enduring temperature 780 °C during...
The mechanisms of divergent V <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">TH</inf> -thermal-stabilities III-nitride (III-N) MIS-HEMT and MOS-Channel-HEMT are revealed in this work. more significant -thermal-instability is attributed to the polarized III-N barrier layer that spatially separates critical gate-dielectric/III-N interface from channel allows "deeper" trap levels emerging above Fermi level at pinch-off. We also reveal influences...
In this work, we studied the mechanisms and switching properties of AlGaN/GaN high-electron-mobility-transistors (HEMTs) passivated by amorphous-SiN <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">x</sub> monocrystal-like AlN. The effects interface traps polarization charges on current collapse are investigated TCAD simulations experimental characterizations. Surface/interface deep levels can be compensated both shallow donor-like (SiN...
Development of III-nitride high-voltage power devices is still challenged by deep traps that are inevitable in state-of-the-art AlGaN/GaN-on-Si epitaxial heterostructures. In this work, we report a heterojunction field-effect transistor featuring photonic-ohmic drain, i.e. PODFET, on conventional electronics platform. Photons synchronously generated with the switching channel current, and they capable effectively pumping electrons from surface/bulk during each cycle. Consequently, dynamic...
In this work, we attempt to reveal the underlying mechanisms of divergent VTH-thermal-stabilities in III-nitride metal-insulator-semiconductor high-electron-mobility transistor (MIS-HEMT) and MOS-Channel-HEMT (MOSC-HEMT). marked contrast MOSC-HEMT featuring temperature-independent VTH, MIS-HEMT with same high-quality gate-dielectric/III-nitride interface similar trap distribution exhibits manifest thermally induced VTH shift. The temperature-dependent is attributed polarized barrier layer,...
Al <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> O xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> –AlGaN/GaN metal–insulator–semiconductor high-electron-mobility transistors (MIS-HEMTs) featuring indium tin oxide transparent gate electrode are fabricated for the purpose of evaluating reliability. The allows electroluminescence (EL) observation in region directly under gate, which cannot be performed conventional MIS-HEMTs with...
A SiNx/AlN dielectric stack, which has been shown to provide a practical, robust, and effective passivation for GaN-based lateral heterojunction power switching devices, was characterized in this work insights on the mechanisms of its current collapse suppression ability. The interface between stack AlGaN/GaN structure by investigating state distribution chemical composition. Such found have much less trap states significantly oxidation than that heterostructure passivated an Al2O3/AlN...
We experimentally demonstrate a high-voltage low-standby power startup circuit for powering up the off-line switched-mode supply (SMPS) during period by exploiting monolithically integrated enhancement/depletion-mode metal-insulator-semiconductor high electron mobility transistors (E/D-mode MIS-HEMTs) fabricated on GaN-on-Si device platform. The E/D-mode MIS-HEMTs exhibit threshold voltage of +1.2 and -11 V, respectively. D-mode used in demonstration features an OFF-state breakdown 640 V...
In addition to surface‐ and buffer‐trapping, interface/border trapping the consequent V TH shift in insulated‐gate GaN power transistors could also cause R ON increase, due reduced gate overdrive. This work reports on a systematic study of mechanisms normally‐on/off subjected dynamic (AC) static (DC) stress. The fast characterizations featuring an ultrashort measurement delay 10 −7 s minimize recovery during enable quantitative evaluation shift‐induced increase. By analyzing time‐resolved...
In this work, silicon nitride (SiNx) film deposited at 780 °C by low pressure chemical vapor deposition (LPCVD) was employed as the passivation layer and gate dielectric for GaN-based MIS-HEMTs. The LPCVD-SiNx/AlGaN/GaN MIS-HEMTs exhibit suppressed current collapse, small leakage both reverse forward bias, high breakdown voltage time dependent reliability.
We demonstrated that the metal-AlGaN/GaN Schottky diode is capable of producing GaN band-edge ultraviolet (UV) emission at 3.4 eV/364 nm under forward bias larger than ∼2 V room temperature. The underlying mechanism hole generation/injection and electroluminescence (EL) processes in this Schottky-on-heterojunction light-emitting (SoH-LED) was discussed based on impact ionization surface states presented (Al)GaN barrier layer. By replacing conventional ohmic drain with a semitransparent...
In this work, we revealed the impacts of Vth shift on Ron in enhancement-/depletion-mode (E/D-mode) GaN transistors under dynamic AC (1 k-1 MHz) stress. With newly developed fast characterization techniques, achieved data acquisition within 120 ns after each stress pulse throughout entire time ranging from 10−7 s up to 103 s. and consequent increase stress, which are more relevant high-frequency switching operation, exhibits frequency dependence is smaller than that conventionally used...
We report normally-off Al <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</inf> O xmlns:xlink="http://www.w3.org/1999/xlink">3</inf> /AlGaN/GaN metal-isolator-semiconductor high-electron-mobility transistor (MIS-HEMT) with improved thermal stability in DC and dynamic performance. The MIS-HEMTs featuring a partially recessed (Al)GaN barrier were realized by fluorine-plasma implantation/etch technique. Both the well-controlled slow dry etching...
Abstract In this work, the Schottky‐on‐heterojunction light‐emitting diodes (SoH‐LED) are monolithically integrated with AlGaN/GaN high‐electron‐mobility transistors (HEMT) on an AlGaN/GaN‐on‐Si platform commonly used for GaN lateral electronic devices. The on‐chip electro‐optic modulation is realized in a single device fabricated using HEMT‐compatible process. Also, SoH‐LED arrays to demonstrate addressable functionality each pixel array individually controlled by HEMT. High‐resolution...