Jonas Weiß

ORCID: 0000-0003-1015-5420
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About
Contact & Profiles
Research Areas
  • Photonic and Optical Devices
  • Semiconductor Lasers and Optical Devices
  • Radio Frequency Integrated Circuit Design
  • Advancements in PLL and VCO Technologies
  • Optical Network Technologies
  • Semiconductor materials and devices
  • Radio Astronomy Observations and Technology
  • Heart Rate Variability and Autonomic Control
  • Neural Networks and Reservoir Computing
  • Antenna Design and Optimization
  • Flood Risk Assessment and Management
  • Nanofabrication and Lithography Techniques
  • Advanced Memory and Neural Computing
  • 3D IC and TSV technologies
  • Non-Invasive Vital Sign Monitoring
  • Superconducting and THz Device Technology
  • Distributed and Parallel Computing Systems
  • Sleep and Work-Related Fatigue
  • Electromagnetic Compatibility and Noise Suppression
  • Tropical and Extratropical Cyclones Research
  • Microwave Engineering and Waveguides
  • Analog and Mixed-Signal Circuit Design
  • Mobile Health and mHealth Applications
  • IoT and Edge/Fog Computing
  • Hydrological Forecasting Using AI

IBM Research - Zurich
2014-2024

IBM Research - Brazil
2022

Netherlands Institute for Radio Astronomy
2018

ABB (Switzerland)
2016

Oerlikon (Switzerland)
2016

IBM (United States)
2006-2015

To satisfy the intra- and inter-system bandwidth requirements of future data centers high-performance computers, low-cost low-power high-throughput optical interconnects will become a key enabling technology. tightly integrate optics with computing hardware, particularly in context CMOS-compatible silicon photonics, printed circuit boards using polymer waveguides are considered as formidable platform. IBM Research has already demonstrated essential photonics interconnection building blocks....

10.1364/oe.23.004736 article EN cc-by Optics Express 2015-02-17

<para xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> A source-series-terminated (SST) transmitter in a 65 nm bulk CMOS technology is presented. The circuit exhibits an eye height greater than 1.0 V for data rates of up to 8.5 Gb/s. thin-oxide pre-driver stage running at drives 22 parallel connected thick-oxide SST output stages operated 1.5 that feature 5-bit 2-tap FIR filter whose adaptation independent the impedance tuning. To achieve return loss...

10.1109/jssc.2008.2006230 article EN IEEE Journal of Solid-State Circuits 2008-12-01

We report on the implementation of novel flexible polymer waveguide interconnects. They are based newly developed mechanically low-loss silicone waveguides. In addition to meeting generic requirements rigid interconnects, several flex-material challenges were mastered: a) mechanical flexibility permitting flexing down radii 1.0 mm without cracking; b) minimization curling induced by CTE mismatch between flex substrates and layers enable assembly connectorization; c) greatly improved cladding...

10.1109/jlt.2013.2282499 article EN Journal of Lightwave Technology 2013-09-20

Abstract Photonics offers exciting opportunities for neuromorphic computing. This paper specifically reviews the prospects of integrated optical solutions accelerating inference and training artificial neural networks. Calculating synaptic function, thereof, is computationally very expensive does not scale well on state-of-the-art computing platforms. Analog signal processing, using linear nonlinear properties devices, a path toward substantially improving performance power efficiency these...

10.1515/nanoph-2020-0297 article EN cc-by Nanophotonics 2020-08-10

Stress detection has a huge potential for disease prevention and management, to improve the quality of life people. Also, work safety can be improved if stress is timely reliably detected. The availability low-cost consumer wearable devices that monitor vital-signs, gives access schemes. Heart rate variability (HRV), stress-related vital-sign, was derived from device data determine stress-levels. In order build train deployable stress-detector, we collected labeled HRV in controlled...

10.1109/embc.2019.8856596 article EN 2019-07-01

We report a receiver for four-level pulse-amplitude modulated (PAM-4) encoded data signals, which was measured to receive at 22 Gb/s with bit error rate (BER) 10 12 maximum frequency deviation of 350 ppm and 2 7 1 PRBS pattern.We propose bit-sliced architecture the path, novel voltage shifting amplifier introduce programmable offset differential signal.We present method characterize sampling latches include them in path.A current-mode logic (CML) biasing scheme using matched resistors limits...

10.1109/jssc.2006.870898 article EN IEEE Journal of Solid-State Circuits 2006-04-01

Abstract The in‐memory computing paradigm aims at overcoming the intrinsic inefficiencies of Von‐Neumann computers by reducing data‐transport per arithmetic operation. Crossbar arrays multilevel memristive devices enable efficient calculations matrix‐vector‐multiplications, an operation extensively called on in artificial intelligence (AI) tasks. Resistive random‐access memories (ReRAMs) are promising candidate for such applications. However, they generally exhibit large stochasticity and...

10.1002/aelm.202200448 article EN cc-by Advanced Electronic Materials 2022-07-10

A half-rate source-series terminated TX, operating at data-rates up to 16Gb/s, targets chip-to-chip on-board interconnects. The TX features a 4-tap FFE, tunable termination, and clock-cleanup circuitry for low duty-cycle distortion, is capable of driving loads referenced variable termination voltage, including Gnd, V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">DD</sub> , /2. Implemented in 65nm SOI, it occupies an area 230 times 56mum <sup...

10.1109/isscc.2007.373486 article EN 2007-02-01

A novel architecture for clock generation in dual-loop subrate and data recovery (CDR) circuits is proposed based on an adjustable phase-locked loop (PLL). The PLL (adjPLL) generates eight equidistant phases, whose timing with respect to a reference can be simultaneously shifted steps of 3 ps, controllable by digital value. programmable phase shift achieved adding the weighted outputs several XOR detectors. measured tracking jitter PLL, fabricated 90-nm SOI CMOS, 0.94 ps rms at 2.5 GHz,...

10.1109/jssc.2005.856581 article EN IEEE Journal of Solid-State Circuits 2005-12-01

A wideband <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">LC</i> PLL in 45-nm SOI CMOS technology is presented that has a center frequency of 12.4 GHz and 1.2 octave locking range. The operation achieved by switching mutual inductances within the inductor coil oscillator. To minimize resistive losses, consists non-switchable primary two isolated secondary coils with series switches. When switches are closed, overall inductance reduces because...

10.1109/jssc.2008.2011041 article EN IEEE Journal of Solid-State Circuits 2009-01-29

Floods cause loss of lives and multi-billion dollar damages every year. When these events strike, automated tools using remote sensing for quick mapping the affected areas are critical planning rescue activities assessing impact. The most recent techniques to map floods based on semantic segmentation deep learning, which require large datasets ground truth training, that difficult get. To overcome this challenge, we propose an effective method synthesizing patches synthetic aperture radar...

10.1109/lgrs.2023.3305936 article EN IEEE Geoscience and Remote Sensing Letters 2023-01-01

So-called `time-of-flight' (TOF) measurements have been employed for locating PD sources within GIS over 20 years. Portable digital sampling oscilloscopes now become available reasonable cost whose input rise-times, bandwidths, and rates are theoretically sufficient to provide spatial resolution approximately 10 centimeters. However, contrary first impressions, does not present an ideal propagation environment GHz bandwidth radio frequency (RF) signals; many factors act prevent reaching such...

10.1109/tdei.2015.005535 article EN IEEE Transactions on Dielectrics and Electrical Insulation 2016-06-01

In future datacenters with disaggregation, dynamic allocation and reconfiguration of resources, I/O networks will become both enabling elements - bottlenecks. We discuss latency in optical data transmission photonics integration packaging, which particularly critical.

10.1109/ecoc.2014.6964255 article EN 2014-09-01

Floods are among the most costly weather hazards for societies and businesses globally. With increasing global warming, these events have become even more frequent devastating. Thus, accurate flood mapping has critical disaster relief, risk management mitigation. Current segmentation methods use either threshold-based approaches or deep-learning schemes, e.g. using U-Net architecture, to differentiate between water-covered bodies dry land on Earth observation images. Many schemes exploiting...

10.1109/bigdata55660.2022.10020911 article EN 2021 IEEE International Conference on Big Data (Big Data) 2022-12-17

A quarter-rate CDR circuit is based on a dual-loop approach where sampling phases are generated by phase-programmable PLL that controlled digital DLL. Implemented in 65nm SOI CMOS, the chip occupies 0.03mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> and consumes 1.8mW/Gb/s. Measurements confirm 40Gb/s operation with BER <10 xmlns:xlink="http://www.w3.org/1999/xlink">-12</sup> at maximum frequency-offset of 400ppm. The phase relation...

10.1109/isscc.2007.373376 article EN 2007-02-01

A wide range of serializer deserializer (SerDes) Compliance Specifications exist for the Return Loss seen at Package interface to printed circuit board (PCB) High Speed Links. For goal achieving interoperability it is expected that most stringent specification met. The performance also an indication available Chip and package bandwidth (BW). This paper demonstrates use a T-Coil (two series connected inductors with center tap) in 90 nm process CMOS SerDes Receiver enable meet addition extend...

10.1109/ectc.2007.373789 article EN 2007-01-01

Big Data and cloud-based applications drive the increasing amount of data traffic between within centers. Optical interconnect technology offers a larger bandwidth-distance product, density power efficiency as copper based links. Integrated silicon photonics provides tight integration optical functions with electronics on single die at competitive cost-level CMOS technology. All necessary photonic building blocks operating 1.3 μm 1.55 have already been demonstrated. However, one remaining...

10.1109/ectc.2015.7159765 article EN 2015-05-01

Source-series-terminated (SST) drivers offer the advantage of providing a large range termination voltages, making them particularly suitable for multi-standard I/Os. Many standards however, call larger vertical eye openings that require raising dc supply voltage from 1.0 V limit thin-oxide devices(FETs) in 65 nm technology to 1.2 or 1.5 V. These requirements are addressed proposed SST transmitter design by combining pre-driver stage running at followed thick-oxide output stages operated Key...

10.1109/isscc.2008.4523081 article EN 2008-02-01

For the realization of a polymer waveguide based optical backplane link for computing applications, we developed a method to passively align multiple layers flex sheets in single MT compatible ferrule. The minimal feature forming is 192 channel link. This equipped with four connector at each end, and performing shuffling channels. We describe passive alignment used realize connectors. The achieved accuracy demonstrated 48 channels connector consisting 4 carrying 12 waveguides each,...

10.1117/12.841904 article EN Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE 2010-02-11

The rapid growth of the space industry is creating an increasing amount data in orbit, which at current time not matched yet by a corresponding increase download capacity. Using analytics edge, i.e., processing on-board satellites, holds promise to significantly mitigate this problem. Newly available and highly efficient artificial intelligence (AI) hardware accelerators other off-the-shelf compute-hardware has already been successfully exploited for demonstrating satellite deep learning....

10.1109/igarss52108.2023.10281701 article EN IGARSS 2022 - 2022 IEEE International Geoscience and Remote Sensing Symposium 2023-07-16

We identify applications for optics-enabled printed circuit boards, together with a list of requirements that have to be met real-world products. draw conclusions the technology choices, and present our approaches experiments.

10.1109/leos.2003.1251600 article EN 2004-09-28

In this paper, we report on a mobile-health intervention study for COPD patients. Mobile devices are used to continuously record relevant patient symptoms, such as lung function, cough intensity, sputum color, vital-signs and activity. Furthermore, behavioral support is provided by bi-directional communication channel virtual assistant communication. The goal train predictive algorithm prevent exacerbations provide personalized coaching improve medication adherence activity level.

10.1109/healthcom.2017.8210845 article EN 2017-10-01
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