A5066365578- Security and Verification in Computing
- Formal Methods in Verification
- Advanced Malware Detection Techniques
- Real-Time Systems Scheduling
- Embedded Systems Design Techniques
- Distributed systems and fault tolerance
- Information and Cyber Security
- Radiation Effects in Electronics
- Logic, programming, and type systems
- Advanced Software Engineering Methodologies
- Network Security and Intrusion Detection
- Parallel Computing and Optimization Techniques
- Safety Systems Engineering in Autonomy
- Software Testing and Debugging Techniques
- Access Control and Trust
- Model-Driven Software Engineering Techniques
- Logic, Reasoning, and Knowledge
- Environmental and Social Impact Assessments
- Quality and Management Systems
- Metallurgy and Material Forming
- Advanced Authentication Protocols Security
- Advanced Neural Network Applications
- International Environmental Law and Policies
- Satellite Communication Systems
- Physical Unclonable Functions (PUFs) and Hardware Security
Huawei German Research Center
2023
Huawei Technologies (Germany)
2022-2023
Saarland University
2005-2019
Sysgo (Czechia)
2011
Often, an integrated mixed-criticality system is built in environment which provides separation functionality for available on-board resources. In this paper we treat such environment: the PikeOS kernel -- a commercial real-time embedded operating system. allows applications with different safety and security levels to run on same hardware. Obviously, relies correct implementation of mechanisms. context Verisoft XT TECOM projects apply deductive formal software verification mechanisms order...
Securing a safety-critical system is challenging task, because safety requirements have to be considered alongside security controls. We report on our experience develop architecture for railway signalling systems starting from the bare that requires protection. use threat-based approach determine risk acceptance criteria and derive requirements. discuss executed process make suggestions improvements. Based requirements, we architecture. The based hardware platform provides resources...
Electronic architectures in the aerospace domain get more and integrated interconnected due to functional architectural reasons. Such a tight integration raises need control information flows between different security domains on-board off-board aircraft. This paper presents discusses specification implementation of software architecture gateway into avionics architectures. The shows that such can be based on current principles implementations domain. We show embedded operating system PikeOS...
The goal of the Open Modular Avionics Architecture for Space Applications (OMAC4S) initiative started by Airbus, Fraunhofer FOKUS, STI, SYSGO and TTTech is to outline a solution that helps contribute obsolesence problem avionivs hardware as well reduce complexity costs hardware/software significantly. During past four decades it could be observed software has grown continuously factor two every years. In early 70's amount was in order few thousands lines code while today's mission have deal...
Transition systems which do not perform domain-specific operations on their state variables can be efficiently reduced. We present two different algorithms automatically eliminate and reduce the domains of occurring from infinite to small domains. Our work extends earlier techniques are applicable solely combinatorial properties temporal transition systems. have implemented our algorithm as a proof method in Isabelle/HOL theorem prover applied it bit-level hardware designs. To demonstrate...
Software architectures in the aerospace domain are becoming more and integrated interconnected for functional architectural reasons (Integrated Modular Avionics, IMA), which exacerbates potential security problems of avionic software. As a consequence, considerations gaining importance general ≫airworthiness≪ modern aircrafts, proper assurance requires increasing effort. In this paper, we report on-going work SeSaM research project. We propose to leverage modularity as key obtain secure...
We present the formal integration of an automotive bus controller into a formally verified gate-level computer system. This system consists complex processor and generic devices which run in parallel. The specification is instruction set architecture with concurrently running visible devices. built electronic control unit base element for distributed its size on FPGA ca. 5 M gate equivalents.
System call relative information such as occurrences, type, parameters, and return values are well established metrics to reveal intrusions in a system software. Many Host Intrusion Detection Systems (HIDS) from research industry analyze these data for continuous monitoring at runtime. Despite significant false alarm rate, this type of defense offers high detection precision both known zero-day attacks. Recent focuses on HIDS deployment desktop computers. Yet, the integration run-time...
Original Equipment Manufacturers now embed hardware virtualization in car equipment to reduce costs and complexity, while allowing more functionalities, such as connectivity. This evolution forces the cohabitation of distinct criticality domains on same hardware, reaffirming need for security. Because trade-off between performance system overall deploying security becomes a challenging balancing act. Host Intrusion Detection Systems (HIDS) protects behavior program at run-time: it monitors...
Systems with mixed and independent levels of security safety become more important in the future. In German funded Bundesministerium fur Bildung und Forschung (BMBF) research project ARAMiS (Automotive, Railway Avionic Multicore Systems) different industry scientific partners concerned on using multi-core processor for critical use-cases. This paper describes motivation use-cases behind actives mobility domains. Also two detailed descriptions a comparison implementation Multiple Independent...
The automotive industry is looking into integrated architecture to combine multiple application subsystems of different criticalities on the readily available low-cost multicore platforms as they promise several benefits. However, it difficult achieve required isolation and guarantees in such an due contention shared resources, e.g., CPU, shared-bus, memory (controller). This can cause unpredictable delays leading deadline misses real-time applications. We propose a low overhead modular...