A5071241846- Advanced Memory and Neural Computing
- Neural dynamics and brain function
- Neuroscience and Neural Engineering
- Ferroelectric and Negative Capacitance Devices
- Neural Networks and Reservoir Computing
- CCD and CMOS Imaging Sensors
- Analog and Mixed-Signal Circuit Design
- Neural Networks and Applications
- Photoreceptor and optogenetics research
- Advancements in PLL and VCO Technologies
- Advancements in Semiconductor Devices and Circuit Design
- EEG and Brain-Computer Interfaces
- Parallel Computing and Optimization Techniques
- Advanced SAR Imaging Techniques
- Advanced Neural Network Applications
- Semiconductor materials and devices
- Radar Systems and Signal Processing
- Image Processing Techniques and Applications
- Low-power high-performance VLSI design
- Modular Robots and Swarm Intelligence
- Embedded Systems Design Techniques
- Radio Frequency Integrated Circuit Design
- Physical Unclonable Functions (PUFs) and Hardware Security
- Semiconductor Lasers and Optical Devices
- Digital Transformation in Industry
TU Dresden
2016-2025
Kirchhoff (Germany)
2022
Heidelberg University
2022
Deutsche Telekom (Slovakia)
2022
Anstalt für Verbrennungskraftmaschinen List (Austria)
2021
Princip (Czechia)
2020
University of Zurich
2014-2018
ETH Zurich
2014-2018
SIB Swiss Institute of Bioinformatics
2014-2018
Center for Systems Biology Dresden
2016
Emulating spiking neural networks on analog neuromorphic hardware offers several advantages over simulating them conventional computers, particularly in terms of speed and energy consumption. However, this usually comes at the cost reduced control dynamics emulated networks. In paper, we demonstrate how iterative training a hardware-emulated network can compensate for anomalies induced by substrate. We first convert deep trained software to BrainScaleS wafer-scale system, thereby enabling an...
Resistive switching devices are considered as one of the most promising candidates for next generation memories and nonvolatile logic applications. In this paper, BiFeO 3 :Ti/BiFeO (BFTO/BFO) bilayer structures with optimized BFTO/BFO thickness ratio which show symmetric, bipolar, resistive good retention endurance performance, presented. The mechanism is understood by a model flexible top bottom Schottky‐like barrier heights in structures. at both positive negative bias make it possible to...
A switched-capacitor (SC) neuromorphic system for closed-loop neural coupling in 28 nm CMOS is presented, occupying 600 um by um. It offers 128 input channels (i.e., presynaptic terminals), 8192 synapses and 64 output neurons). Biologically realistic neuron synapse dynamics are achieved via a faithful translation of the behavioural equations to SC circuits. As leakage currents significantly affect circuit behaviour at this technology node, dedicated compensation techniques employed achieve...
Abstract Brain function relies on circuits of spiking neurons with synapses playing the key role merging transmission memory storage and processing. Electronics has made important advances to emulate brain-computer interfacing concepts that interlink brain brain-inspired devices are beginning materialise. We report memristive links between silicon plasticity properties real synapses. A memristor paired a metal-thin film titanium oxide microelectrode connects neuron rat hippocampus....
SpiNNaker is an ARM-based processor platform optimized for the simulation of spiking neural networks. This brief describes roadmap in going from current SPINNaker1 system, a 1 Million core machine 130nm CMOS, to SpiNNaker2, 10 22nm FDSOI. Apart pure scaling, we will take advantage specific technology features, such as runtime adaptive body biasing, deliver cutting-edge power consumption. Power management cores allows wide range workload adaptivity, i.e. scales with complexity and activity...
This demonstration is based on the wafer-scale neuromophic system presented in previous papers by Schemmel et. al. (20120), Scholze (2011) and Millner (2010). The setup will allow visitors to monitor partially manipulate neural events at every level. They get an insight into complex interplay between packet-based realtime communication necessary combine continuous-time mixed-signal networks with a transport network. Several network experiments implemented be accessible for user interaction.
Memristive devices are popular among neuromorphic engineers for their ability to emulate forms of spike-driven synaptic plasticity by applying specific voltage and current waveforms at two terminals. In this paper, we investigate spike-timing dependent (STDP) with a single pairing one presynaptic spike post-synaptic in BiFeO3 memristive device. most materials the learning window is primarily function material characteristics not applied waveform. contrast, show that analog resistive...
The memory requirement of deep learning algorithms is considered incompatible with the restriction energy-efficient hardware. A low footprint can be achieved by pruning obsolete connections or reducing precision connection strengths after network has been trained. Yet, these techniques are not applicable to case when neural networks have trained directly on hardware due hard constraints. Deep Rewiring (DEEP R) a training algorithm which continuously rewires while preserving very sparse...
This paper introduces the processing element architecture of second generation SpiNNaker chip, implemented in 22nm FDSOI. On circuit level, chip features adaptive body biasing for near-threshold operation, and dynamic voltage-and-frequency scaling driven by spiking activity. system is centered around an ARM M4 core, similar to processor-centric first SpiNNaker. To speed operation subtasks, we have added accelerators numerical operations both (SNN) rate based (deep) neural networks (DNN). PEs...
Abstract We implemented two neural network based benchmark tasks on a prototype chip of the second-generation SpiNNaker (SpiNNaker 2) neuromorphic system: keyword spotting and adaptive robotic control. Keyword is commonly used in smart speakers to listen for wake words, control applications adapt unknown dynamics an online fashion. highlight benefit multiply-accumulate (MAC) array 2 which ordinarily rate-based machine learning networks when employed neuromorphic, spiking context. In...
With the advent of high-density micro-electrodes arrays, developing neural probes satisfying real-time and stringent power-efficiency requirements becomes more challenging. A smart probe is an essential device in future neuroscientific research medical applications. To realize such devices, we present a 22 nm FDSOI SoC with complex on-chip data processing training for signal analysis. It consists digitally-assisted 16-channel analog front-end 1.52 μW/Ch, dedicated bio-processing accelerators...
The field of neuromorphic computing holds great promise in terms advancing efficiency and capabilities by following brain-inspired principles. However, the rich diversity techniques employed research has resulted a lack clear standards for benchmarking, hindering effective evaluation advantages strengths methods compared to traditional deep-learning-based methods. This paper presents collaborative effort, bringing together members from academia industry, define benchmarks computing:...
The joint progress of artificial neural networks (ANNs) and domain specific hardware accelerators such as GPUs TPUs took over many domains machine learning research. This development is accompanied by a rapid growth the required computational demands for larger models more data. Concurrently, emerging properties foundation in-context drive new opportunities applications. However, cost applications limiting factor technology in data centers, importantly mobile devices edge systems. To mediate...
As humans advance toward a higher level of artificial intelligence, it is always at the cost escalating computational resource consumption, which requires developing novel solutions to meet exponential growth AI computing demand. Neuromorphic hardware takes inspiration from how brain processes information and promises energy-efficient workloads. Despite its potential, neuromorphic has not found way into commercial data centers. In this article, we try analyze underlying reasons for derive...
Chua [IEEE Trans. Circuit Theory 18, 507-519 (1971)] predicted rather simple charge-flux curves for active and passive memristors (short memory resistors) presented memristor circuit realizations already in the 1970 s. The first has been 2008 [D. B. Strukov, G. S. Snider, D. R. Williams, Nature (London) 453, 80-83 (2008)]. Typically, are traced complicated hysteretic current-voltage curves. Therefore, true essence of many new memristive devices not discovered so far. Here, we give a...
In the field of brain-machine interfaces, biohybrids offer an interesting new perspective, as in them, technological side acts like a closed-loop extension or real counterpart biological tissue, instead usual open loop approaches tranditional BMI. To achieve credible to usually employ one several neuromorphic components hardware half biohybrid. However, advanced circuit such memristor crossbars operate best dedicated lab with corresponding support equipment. The same is true for which makes...
Classically, action-potential-based learning paradigms such as the Bienenstock-Cooper-Munroe (BCM) rule for pulse rates or spike timing-dependent plasticity pairings have been experimentally demonstrated to evoke long-lasting synaptic weight changes (i.e., plasticity). However, several recent experiments shown that also depends on local dynamics at synapse, membrane voltage, Calcium time course and level, dendritic spikes. In this paper, we introduce a formulation of BCM which is based...