A5065609642- Radio Frequency Integrated Circuit Design
- Microwave Engineering and Waveguides
- Advancements in PLL and VCO Technologies
- Photonic and Optical Devices
- Millimeter-Wave Propagation and Modeling
- Antenna Design and Analysis
- Semiconductor Lasers and Optical Devices
- Ultra-Wideband Communications Technology
- Superconducting and THz Device Technology
- Wireless Body Area Networks
- Electromagnetic Compatibility and Noise Suppression
- Microwave and Dielectric Measurement Techniques
- Full-Duplex Wireless Communications
- Advanced Power Amplifier Design
- Analog and Mixed-Signal Circuit Design
- Neural Networks and Reservoir Computing
- Advanced Photonic Communication Systems
- Gyrotron and Vacuum Electronics Research
- 3D IC and TSV technologies
- Chalcogenide Semiconductor Thin Films
- Optical Network Technologies
- Electromagnetic Compatibility and Measurements
- Advanced Antenna and Metasurface Technologies
- Advanced Optical Sensing Technologies
- Molecular Communication and Nanonetworks
National Institute of Information and Communications Technology
2016-2024
Aerospace Information Research Institute
2022-2024
Chinese Academy of Sciences
2022-2024
Hiroshima University of Economics
2019
Hiroshima University
2017-2019
Friedrich-Alexander-Universität Erlangen-Nürnberg
2019
National Institute of Advanced Industrial Science and Technology
2019
Higashihiroshima Medical Center
2019
Kyushu University
2009-2017
Xiamen University
2017
A single-chip CMOS transceiver (TRX) capable of wireless data rates up to 80 Gb/s using part frequencies (252–279 GHz) covered by IEEE Std 802.15.3d is presented. The TRX chip operates in either transmitter (TX) or receiver (RX) mode at comparable <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${f_{\mathrm {max}}}$ </tex-math></inline-formula> the NMOSFET. TX adopts mixer-last architecture with four-way...
"High speed" in communications often means "high data-rate" and fiber-optic technologies have long been ahead of wireless that regard. However, an overlooked definite advantage links over is waves travel at the speed light c, which about 50% faster than optical fibers as shown Fig. 17.9.1 (top left). This "minimum latency" crucial for applications requiring real-time responses a distance, including high-frequency trading [1]. Further opportunities new might be created if absolute minimum...
Building receivers (RXs) that operate above the transistor unity-power-gain frequency, f <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">max</inf> , is extremely challenging because an LNA-less architecture must be adopted. This paper reports on a 300-GHz CMOS RX operating NMOS /max. Its conversion gain, noise figure, and 3-dB bandwidth are, respectively, −19.5 dB, 27 26.5 GHz. The achieved wireless data rate of 32 Gb/s with 16QAM. It shows...
IEEE Standard 802.15.3d, published in October 2017, defines a high-data-rate wireless physical layer that enables up to 100Gb/s using the lower THz frequency range between 252 and 325GHz (hereafter referred as "300GHz band"). It stipulates 300GHz band be channelized into thirty-two 2.16GHz-wide channels (Fig. 9.5.1) or smaller number of wider whose bandwidths are all integer multiples 2.16GHz. This paper presents CMOS transceiver (TRX) chip targeted at 49 through 51 66 802.15.3d 9.5.1). The...
A 76-Gbit/s 265-GHz CMOS receiver (RX) modularized with a WR-3.4 waveguide interface is presented. It mixer-first RX fabricated using 40-nm technology. The primary design focus simplicity and the resulting low noise loss high conversion gain (CG). To allow for both on-wafer packaged measurements, ON-chip transmission lines are designed such that their characteristics relatively insensitive to presence or absence of adhesive covering chip. chip flip-chip-mounted on multilayer printed circuit...
The effect of surface dangling bonds (SDBs) on the doping InAs nanowires is investigated by first-principles calculations within density functional theory. result formation energies shows that In atom are a kind stable defect. Moreover, prefer to be charged and form trap centers carriers. For ultrathin nanowires, both positively negatively SDBs can produced. With increase size, energy region has diminished gradually disappeared, but keep high stability. originates from quantum confinement...
The vast terahertz frequency band around 300 GHz has a potential to be used for next-generation wireless communication. 300-GHz transceiver been developed using silicon CMOS technology of which the unity-power-gain frequency, $\pmb{f_{\max}}$, is below said band. Possible channel allocation and design are discussed.
A 300-GHz CMOS transmitter module with a WR-3.4 waveguide interface is presented. The flip-chip mounted on low-cost multilayered glass epoxy printed circuit board (PCB) and transmission-line-to-waveguide transition back-short structure built of the PCB. measured output power 3-dB bandwidth are approximately −13.5 dBm 10 GHz, respectively. wireless data rate 48 Gbit/s over 5 cm 16-QAM achieved using module.
A 300-GHz CMOS receiver module with a WR-3.4 waveguide interface is presented. The flip-chip mounted on low-cost multilayered glass epoxy printed circuit board (PCB). transmission-line-to-waveguide transition back-short structure built into the PCB. measured conversion gain, noise figure, and 3-dB bandwidth of are approximately −23.7 dB, 33 dB 18.4 GHz, respectively. Packaging loss estimated to be 4 from gain chip −19.5 dB. wireless data rate 20 Gbit/s 16-QAM was achieved using designed modules.
A ×9 frequency multiplier chain with 3-dB bandwidth of 213-233 GHz was implemented in 40nm bulk CMOS. It realized 4.1 dBm peak output power without using combining. Two triplers are cascaded to realize ninth time multiplication the input frequency. center-taped transformer and a notched filter used suppress 1st 2nd harmonics tripler, respectively. J-band amplification block, which is similar injection locked oscillator, design enhance suppression. Comparing expected 9th harmonic, 4th 6th...
A 272-GHz CMOS receiver (RX) for IEEE 802.15.3d, capable of an analog BPSK/QPSK demodulation based on a Costas loop, is presented. QPSK realized with the non-linear operation phase detector at BPSK-demodulation loop. An 8-Gbaud BPSK and 4-Gbaud carrier frequency 272.16 GHz (channel 58 802.15.3d) are achieved.
This paper presents a design of an improved on-chip open loop resonator band pass filter (OLR-BPF) for 60 GHz millimeter-wave applications in 0.18 μm CMOS technology. The proposed BPF employs the folded structure on patterned ground shields. adoption OLR-BPF and utilization two transmissions zero permits compact size high selectivity BPF. In addition, shields obviously slowed down guided waves, which enables further reduction physical length finally improvement insertion loss By comparison...
A low-power ultrawideband (UWB) pulse generator based on pulsed oscillator architecture for 3-5 GHz applications is proposed. The improved, so it realizes binary phase shift keying (BPSK) modulation. Unlike ON-OFF or pulse-position modulation (PPM), BPSK can scramble the spectrum, be used in high rate without having spectral line problem. signal structure this design burst mode of PPM+BPSK. proposed UWB was successfully implemented 0.18-μm CMOS technology. peak-to-peak amplitude output about...
This paper reports on a 300-GHz CMOS receiver with an LNA-less architecture that operates above NMOS unity-power-gain frequency, f <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">max</inf> . Both low power consumption and high conversion gain are achieved using high-performance tripler-last multiplier combined downconversion mixer. Its 3-dB bandwidth −18 dB 33 GHz, respectively. The achieves wireless data rate of 32 Gb/s 16QAM.
Lower terahertz (THz) frequency band above 250 GHz is considered a promising platform for ultrahigh-speed broadband wireless communications beyond 5G [1]. Standardization of frequencies around 300 (hereafter referred to as the "300-GHz band") discussed in [2, 3]. Research and development transceiver circuits modules operating 300-GHz have actively been pursued [4–7].
Low-loss half-mode substrate integrated waveguide (HMSIW)-based interconnects and transmission lines are designed implemented in Complementary Metal-Oxide Semiconductor (CMOS) technology. In HMSIW interconnects, complementary split ring resonators (CSRR) whose self-resonance is much higher than the cut-off frequency of SIW etched on, due to which matching improved. By controlling parameters CSRRs, losses microstrip transition substantially improved, no extra external circuit required. A...
This paper presents low-noise amplifier (LNA)-less 300-GHz CMOS receivers that operate above the NMOS unity-power-gain frequency, fmax. The consist of a down-conversion mixer with doubler- or tripler-last multiplier chain upconverts an LO1/n signal into 300 GHz. conversion gain receiver doubler-last is -19.5 dB and its noise figure, 3-dB bandwidth, power consumption are 27 dB, GHz, 0.65 W, respectively. -18 25.5 33 0.41 achieve wireless data rate 32 Gb/s 16QAM. shows potential moderate-fmax...
This paper presents a 258-GHz CMOS transmitter with phase-shifting capability for phased-array systems targeting sixth-generation mobile network (6G). Phase shifters are inserted in local oscillator (LO) paths to limit the bandwidth required of phase shifters. A power detector is used detect and calibrate difference between pair two power-combined transmitter. It fabricated using 40-nm technology. data rate 16 Gb/s output −6.8 dBm achieved quaternary phase-shift keying (QPSK). The...
This paper presents an improved 4-stage on-chip open loop resonator band pass filter (OLR-BPF) for 60 GHz millimeter-wave applications in 0.18 μm CMOS technology. The proposed BPF employs the folded structure on patterned ground shields first two stage and open-loop last stages to improve selectivity. By comparison between electromagnetic (EM) simulations measurement results, has center frequency of 57 GHz, insertion loss 3.06 dB, width 12 return is less than 30 chip size 0.73 <sup...
This paper proposes a cascaded fractional-N phase-locked loop (PLL) based on high-frequency piezoelectric resonator (PZR). Sub-ppb-order frequency resolution is achieved by channel adjustment technique. Besides its small form factor, high- <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${Q}$ </tex-math></inline-formula> PZR at gigahertz frequencies realizes very low phase-noise synthesizer for RF...
It is common to determine the characteristic impedance <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">${Z}_{0}$</tex> of a low-loss transmission line using measured propagation constant xmlns:xlink="http://www.w3.org/1999/xlink">$\gamma$</tex> through xmlns:xlink="http://www.w3.org/1999/xlink">${Z}_{0}=\gamma/({G}+\mathrm{j}\omega {C})$</tex> , assuming that parallel conductance xmlns:xlink="http://www.w3.org/1999/xlink">${G}=0$</tex> and...
A novel × 6 frequency multiplier chain with a center of 260 GHz is developed in 40 nm CMOS and measured through this work. The multiplication accomplished an 3 followed by doubler successive stage. four-way signal combiner employed to enhance the output power, whereas phase shifters are dedicated for compensating possible deviations between different combined ways, consequently maintain combining efficiency. For further power boosting, matching network 260-GHz optimized, stacked amplifier...
THz wireless communications offer very high data rates but tend to be power hungry. This paper demonstrates a technique for drastically reducing receiver-side consumption near-field links using 300-GHz CMOS transmitter (TX) and receiver (RX). Since significant part of RX-side is accounted by LO signal generation used downconversion, the RX obviates need letting TX send out not only sideband also an signal, which by-product upconversion usually suppressed. The then performs self-heterodyne...