A5068601963- Radio Frequency Integrated Circuit Design
- Infrared Target Detection Methodologies
- CCD and CMOS Imaging Sensors
- Advanced Semiconductor Detectors and Materials
- Advancements in Semiconductor Devices and Circuit Design
- Analog and Mixed-Signal Circuit Design
- Advanced Power Amplifier Design
- Low-power high-performance VLSI design
- Semiconductor materials and devices
- Industrial Automation and Control Systems
- Transition Metal Oxide Nanomaterials
- GaN-based semiconductor devices and materials
- Wireless Communication Networks Research
- Thermoelastic and Magnetoelastic Phenomena
- Ultrasonics and Acoustic Wave Propagation
- VLSI and Analog Circuit Testing
- Thermography and Photoacoustic Techniques
- Advancements in PLL and VCO Technologies
- Microwave Engineering and Waveguides
The Ohio State University
2018-2022
Zagazig University
2019
Northern Arizona University
2004
This paper compares the performance of three low drop-out (LDO) voltage regulators (simple LDO, LDO with common-source, and source-follower) in load regulation transient response. The are designed 1.6 /spl mu/m technology different error amplifier designs to investigate regulating performance. each architecture is verified by simulation results.
An analysis of timing and input-referred offset sense amplifiers (SA) is presented, a new SA architecture with capacitive correction proposed. Offset sources are first analyzed in cross-coupled latch-based design, the then extended to proposed SA. The results show technique can reduce total sensing time by up 40%, while eliminating dynamic due difference resolving inverters trip points. A self-timed SRAM replica structure designed generate optimal enable respect offset. Calculations for...
This article presents a detailed analysis of the impact tank feedline on tuning range (TR) and phase noise (PN) in millimeter-wave <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">LC</i> voltage-controlled oscillators (VCOs). A robust extended TR design, with low PN small die area, is later proposed, analyzed, experimentally validated. new interconnect approach for coarse capacitor bank used to significantly reduce routing capacitance...
This paper presents the first experimental investigation of a broadband outphasing power amplifier designed in 150nm GaN process utilizing Doherty-Chireix Continuum. Simulations show peak drain efficiency above 35% from 3.5-7 GHz. Peak was measured to be 53% when using pulsed-RF signal at 3.5 GHz with pulse width 1μs and duty rate 0.1%. Series inductors shunt capacitors were used minimize total die area. The has area 3mm x 4mm.
We theoretically and experimentally investigate the application of an open-circuit voltage photodetector (VocP) architecture for mid-wave infrared (MWIR, 3–5 μm) detection imaging. In contrast to conventional reverse-bias (RB) operation diode, which generates a photocurrent that is proportional photon irradiance, we evaluate potential using unbiased diodes generate voltage, VOC, under illumination. The predicted Noise Equivalent Differential Temperature (NEDT) VocP inferior RB when assume...
A CMOS SRAM design in 130 nm BiCMOS SiGe technology is presented. 10 Kb array was designed to operate at a 500 MHz clock and 1.5 V supply. The implemented four 2.5 quadrants with shared column row addresses local quadrant decoding. calibrated tunable replica timing structure technique used generate optimal sense amplifier (SA) enable by replicating both delay of the memory simultaneously using bitline wordline structures. new capacitive offset cancellation for current-mode SA proposed. Using...
This article presents a highly linear BiCMOS sample and hold amplifier (SHA) providing 2.8 GS/s intermediate frequency (IF) sampling for 1 GHz bandwidth input spanning from 1.5 to 2.5 GHz. A single-transistor hold-mode feedthrough cancellation technique is implemented remove the distortion resulting nonlinear parasitic capacitance at node. The SHA designed in mainstream 130 nm technology using SiGe heterojunction bipolar transistors (HBTs) buffer wide-band input. Potential inclusion of this...
This paper presents a highly linear BiCMOS sample and hold amplifier (SHA) providing 2.8-GS/s intermediate frequency (IF) sampling for 1-GHz input bandwidth spanning from 1.5 to 2.5 GHz. A single-transistor hold-mode feedthrough cancellation technique is implemented remove distortion resulting the nonlinear parasitic capacitance at node. The SHA designed in mainstream 130-nm technology using SiGe heterojunction bipolar transistors buffer wideband input. proposed enables monolithic...
Emphasis on the size, weight, and power (SWaP) of RF systems has led engineers to design microwave components for reusability in different wireless applications. One such component is Power Amplifier (PA) which a critical chain. The desire re-use single PA multiple applications resulted large interest reconfigurable technology. Reconfigurable technology would facilitate reduction SWaP system thus garnered from designers alike. This work reviews several techniques found that promote...
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An imaging pixel unit-cell topology leveraging a photodetector in the forward-bias region is proposed. Connecting anode of photodiode to gate NMOS device operating subthreshold provides basis for new open-circuit voltage (VocP) architecture. Theoretical analysis presented show response and performance benefits VocP comparison conventional pixel. Based on this analysis, signal noise relationships both pixels are derived leveraged construct an end-to-end readout system model. The model results...
Strong motivation for low-cost infrared imaging devices over the past few years have given rise to advances in detector technology, specifically mid-wave (MWIR) region. With increasing demand small pixel sizes and large format focal plane arrays (FPAs), extreme complexity realizing MWIR imagers is expected increase difficulty. In this work, a novel approach provide improved detection at high operating temperatures proposed by integrating proven photovoltaic material mature digital CMOS Image...
Unlike conventional detectors that rely on photocurrent, the open circuit voltage photodetector architecture relies a detector operating in zero bias. The output from is coupled to gate of FET sub-threshold region. Radiometric characterization this will be discussed.
A topology leveraging a photodetector in the forward bias region generating an open-circuit voltage is proposed. Connecting anode of to gate MOSFET device operating subthreshold provides basis for new pixel (VocP). Theoretical analysis outlining effective response and performance benefits described. An integrated circuit (IC) with direct-injection pixels modified support VocP front-end analog output readout fabricated CMOS 0.18 μm technology also presented. The IC allows testing mid-wave...
An imaging pixel unit-cell topology leveraging a photodiode in the forward-bias region is proposed for visible and near-infrared spectral ranges. The open-circuit voltage (VocP) architecture applied to allows improvement effective responsivity of photodetector, leading significant enhancement sensitivity across wide spectral-range, while relaxing requirements on photodiode, chosen CMOS process. Theoretical analysis presented show operation, response, performance benefits VocP. has been...
Review on the Evolution of Low-