Xiao Yu

ORCID: 0000-0001-8769-521X
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About
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Research Areas
  • Semiconductor materials and devices
  • Ferroelectric and Negative Capacitance Devices
  • Advancements in Semiconductor Devices and Circuit Design
  • Advanced Memory and Neural Computing
  • MXene and MAX Phase Materials
  • Integrated Circuits and Semiconductor Failure Analysis
  • Nanowire Synthesis and Applications
  • Ferroelectric and Piezoelectric Materials
  • Semiconductor materials and interfaces
  • Photonic and Optical Devices
  • Silicon Nanostructures and Photoluminescence
  • Thin-Film Transistor Technologies
  • Silicon Carbide Semiconductor Technologies
  • Electronic and Structural Properties of Oxides
  • Photonic Crystals and Applications
  • 3D IC and TSV technologies
  • Neural Networks and Reservoir Computing
  • Terahertz technology and applications
  • Acoustic Wave Resonator Technologies
  • Injection Molding Process and Properties
  • Phase-change materials and chalcogenides
  • Multiferroics and related materials
  • Advanced ceramic materials synthesis
  • Magnetic properties of thin films
  • Advanced machining processes and optimization

Xidian University
2024-2025

Zhejiang Lab
2020-2024

Zhejiang University
2016-2020

Japan Science and Technology Agency
2015-2017

The University of Tokyo
2013-2017

Tokyo University of Information Sciences
2017

Zhejiang Normal University
2016

Centre for Research in Engineering Surface Technology
2015

Northeast Forestry University
2009

Peking University
2005

HfO<sub>2</sub>-ZrO<sub>2</sub> superlattice (SL) ferroelectric (FE) capacitor is demonstrated to have improved endurance performance and higher fatigue recovery capability compared the HfZrO<sub><i>x</i></sub> (HZO) device. During cycling of polarization (<inline-formula> <tex-math notation="LaTeX">${P}$ </tex-math></inline-formula>) <i>vs.</i> voltage notation="LaTeX">${V}$ loops, SL metal-FE-metal (MFM) exhibits <inline-formula> </tex-math></inline-formula> lower leakage current over HZO...

10.1109/led.2021.3135961 article EN IEEE Electron Device Letters 2021-12-16

In this article, a phase-field polarization switching model for ferroelectric HfO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> -based thin films considering oxygen vacancies ( <inline-formula xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${V}_{o}$ </tex-math></inline-formula> ) has been developed based on the 2-D time-dependent Ginzburg–Landau (TDGL) equation coupling with Poisson's equation. The impacts of...

10.1109/ted.2022.3190256 article EN IEEE Transactions on Electron Devices 2022-07-20

HfO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> /AlO xmlns:xlink="http://www.w3.org/1999/xlink">x</sub> /GeO gate-stacks have been fabricated on Ge surfaces by in situ ozone postoxidation method. It is found that the ultrathin GeOx interfacial layer beneath high-k capping formed postoxidation, yielding sufficiently low density of interface traps. In addition, due to crystallization , permittivity increases after postoxidation. As a...

10.1109/led.2016.2572731 article EN IEEE Electron Device Letters 2016-05-25

HfO2-ZrO2 superlattice (SL) ferroelectric (FE) ultrathin films exhibit significant improvement in endurance performance compared with solid-solution HfxZr1−xO2 (HZO). Despite the experimental evidence, underlying microscopic mechanisms of enhanced reliability SL remain elusive. This Letter explores mechanism by performing first-principle calculations on and HZO systems. The can be well explained higher oxygen vacancy (Vo) migration energy barriers along FE polarization direction, which slow...

10.1063/5.0127136 article EN Applied Physics Letters 2022-12-12

Abstract This work reviews the state-of-the art multi-gate field-effect transistor (MuGFET) process technologies and compares device performance reliability characteristics of MuGFETs with planar Si CMOS devices. Owing to 3D wrapped gate structure, can suppress SCEs improve ON-current due volume inversion channel region. As technology pioneers sub-10 nm nodes, challenges in terms lithography capability, integration controversies, variability etc. were also discussed this work. Due severe...

10.1088/1674-4926/42/2/023102 article EN Journal of Semiconductors 2021-02-01

In this article, an analog synapse based on a nonvolatile field-effect transistor with amorphous ZrO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> dielectrics has been fabricated and demonstrated. The conductance modulation properties of the devices have systematically evaluated. Due to polarization switching dynamics ferroelectric-like dielectric, which is attributable voltage-driven oxygen vacancies negative charges dipoles, proposed...

10.1109/ted.2021.3139570 article EN IEEE Transactions on Electron Devices 2022-01-13

We demonstrate electrical characterizations within sub-1 ns to investigate the self-heating effect (SHE) in 14 nm FinFETs, for first time. Thanks extremely fast I-V measurement speed (~500 ps), heat generation and dissipation process transistor channel are precisely captured. Furthermore, unique correlation between temperature drain current at different gate biases is obtained. With this correlation, transient static temperatures could be extracted devices with any working conditions...

10.1109/iedm.2017.8268520 article EN 2021 IEEE International Electron Devices Meeting (IEDM) 2017-12-01

GeO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">x</sub> /Ge interfaces are fabricated by plasma post oxidation of Al xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> O xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> (100) structures at 300 °C and room temperature (RT). It is found that reduction results in a significant decrease the interface roughness slight increase trap density. The Ge p- n-channel MOSFETs with oxidized RT provide...

10.1109/ted.2013.2295822 article EN IEEE Transactions on Electron Devices 2014-01-24

In this brief, we report that HfO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> –ZrO superlattice (SL) ferroelectric field-effect transistors (FeFETs) demonstrate improved endurance, fatigue recovery, and retention performance compared to the HfZrO xmlns:xlink="http://www.w3.org/1999/xlink"><i>x</i></sub> (HZO) control devices. During program/erase (P/E) cycling data retention, density of interface traps is observed increase less in SL...

10.1109/ted.2023.3279063 article EN IEEE Transactions on Electron Devices 2023-06-07

We have proposed and experimentally demonstrated a novel multi-bit content addressable memory (CAM) cell based on two series connected ferroelectric FETs (FeFETs). Thanks to the multilevel (MLC) operations of FeFETs complementary inputs search lines (SLs), CAM functions with 2-bits/cell are realized. Bit density can be further boosted by implementing more stable states FeFETs. In addition, cells integrated in form 3D vertical FeFET NAND, which enables ultra-high energy efficiency at low...

10.1109/led.2023.3277845 article EN IEEE Electron Device Letters 2023-05-19

Mechanisms of the mobility degradation in high normal field (or Ns) Ge pand n-metal-oxide-semiconductor field-effect transistors (MOSFETs) with plasma postoxidation GeO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">x</sub> /Ge MOS interfaces: 1) carrier trapping due to surface states; 2) roughness scattering; and 3) electron transfer into Δ valleys effective mass, have been systematically investigated. It is confirmed that existence states...

10.1109/ted.2014.2325604 article EN IEEE Transactions on Electron Devices 2014-06-19

The impact of surface orientations on electrical characteristics Ge pand n-channel MOSFETs with ultrathin equivalent oxide thickness Al <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> O xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> /GeOx/Ge gate-stacks is systematically investigated. It found that (100), (110), and (111) GeOx/p-Ge metal-oxide-semiconductor (MOS) interfaces have a similar interface trap density (D...

10.1109/ted.2014.2359678 article EN IEEE Transactions on Electron Devices 2014-10-08

We have experimentally investigated disturb-free operations of multilevel cell (MLC) ferroelectric field-effect transistors (FeFETs) in a NAND array. The fabricated FeFET cells are systematically characterized, and optimized schemes to write into multiple states with high stability investigated. Write read achieve stable MLC arrays proposed. For the realization operations, both program disturbs characterized at array level. In addition, margins inhibition voltage ( <inline-formula...

10.1109/ted.2023.3242922 article EN IEEE Transactions on Electron Devices 2023-02-14

We have experimentally demonstrated that the ferroelectricity can be controlled by reversibly injecting oxygen vacancies ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${V}_{\text {o}}{)}$ </tex-math></inline-formula> from interfacial layer (IL) of TiOxNy to Hf notation="LaTeX">$_{{0}.{5}}$ Zr0.5O2(HZO) or extracting them HZO IL in titanium nitride (TiN) notation="LaTeX">$/$ TiN structure for first time....

10.1109/ted.2023.3246028 article EN IEEE Transactions on Electron Devices 2023-02-24

Ultrahigh-density data storage is realized using a thermochemical hole-burning technique based on scanning tunneling microscopy (STM). The heating effect induced by the STM current gives rise to localized decomposition of an organic charge-transfer complex substrate and subsequent gasification its low- boiling-point products. A large array nanometer-sized holes recorded (see Figure). Supporting information for this article available WWW under...

10.1002/adma.200401148 article EN Advanced Materials 2005-02-18

In this paper, we have successfully demonstrated high quality Extremely-thin body (ETB) Ge-on-insulator (GOI) p-MOSFETs with thickness ranging from 25 nm to 2 nm. Furthermore, the hole mobility and GOI dependence over a wide range of down are systematically analyzed understood viewpoint scattering mechanisms, for first time.

10.1109/iedm.2015.7409611 article EN 2021 IEEE International Electron Devices Meeting (IEDM) 2015-12-01

The ultra-thin body and buried-oxide (UTBB) Germanium-on-Insulator (GeOI) substrates have been fabricated by direct wafer bonding polishing techniques. Ge BOX layer thicknesses are as thin 9 13 nm, respectively. UTBB GeOI exhibit superior crystal quality (similar to the bulk single crystalline Ge) sufficiently reduced surface roughness. As a result, Hall hole mobility of reaches 1330 cm2/V s with carrier concentration 2 × 1016 cm−3. inversion mode nMOSFETs also demonstrated suppressed...

10.1063/1.4955486 article EN Applied Physics Letters 2016-07-11

The realization of Ge gate stacks with a small amount slow trap density as well thin equivalent oxide thickness and low interface state (Dit) is crucial issue for CMOS. In this study, we examine the properties traps, particularly location Al2O3/GeOx/n-Ge HfO2/Al2O3/GeOx/n-Ge MOS interfaces changing process structural parameters, formed by atomic layer deposition (ALD) Al2O3 HfO2/Al2O3 combined plasma post oxidation. It found that traps can locate in GeOx interfacial layer, not ALD layer....

10.1063/1.4958890 article EN Applied Physics Letters 2016-07-18

The sensitivity enhancement of piezoelectric force sensors is investigated based on multiple effects in this paper. At first, theoretical analysis showed that had an influence the sensors. Secondly, a practicable method was adopted to perform experimental validation and quantify effects. In method, different capacitors whose capacitances became much larger than quartz sensor were parallel with sensor. With details obtained. Experimental results increased from 4.00 pC/N 4.07 when capacitance...

10.1063/1.4960212 article EN cc-by AIP Advances 2016-07-01
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