A5101467900- Photonic and Optical Devices
- Optical Network Technologies
- Semiconductor Lasers and Optical Devices
- Advanced Photonic Communication Systems
- Analog and Mixed-Signal Circuit Design
- Advancements in PLL and VCO Technologies
- Semiconductor materials and devices
- Analytical Chemistry and Sensors
- CCD and CMOS Imaging Sensors
- Biomedical and Engineering Education
- Metallic Glasses and Amorphous Alloys
- Glass properties and applications
- Biomedical Ethics and Regulation
- Material Dynamics and Properties
Institute of Semiconductors
2019-2024
Chinese Academy of Sciences
2016-2024
Xi'an University of Technology
2019-2022
Bioengineering Center
2016-2017
National Center for Genetic Engineering and Biotechnology
2016-2017
John Wiley & Sons (United States)
2016-2017
Hudson Institute
2016-2017
We demonstrate the optical transmission of an 800 Gbit/s ( <mml:math xmlns:mml="http://www.w3.org/1998/Math/MathML" display="inline" id="m1"> <mml:mrow> <mml:mn>4</mml:mn> <mml:mo>×</mml:mo> <mml:mn>200</mml:mn> <mml:mtext> </mml:mtext> <mml:mi>Gbit</mml:mi> <mml:mo>/</mml:mo> <mml:mi mathvariant="normal">s</mml:mi> </mml:mrow> </mml:math> ) pulse amplitude modulation-4 (PAM-4) signal and a 480 id="m2"> <mml:mn>120</mml:mn> on–off-keying (OOK) by using high-bandwidth (BW) silicon photonic...
This paper presents a hybrid-integrated optical transceiver front-end for beyond-400G short-reach links. A pair of the monolithic 8-channel laser drivers and trans-impedance amplifier (TIA) is developed in 180nm SiGe BiCMOS, incorporating arrayed Vertical-Cavity-Surface- Emitting Lasers photo-detectors. The driver uses <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$2^{\mathrm {nd}}$...
A 50-Gb/s four-level pulse-amplitude modulation (PAM4) silicon photonic transmitter is presented, which composed of a 40-nm bulk CMOS driver hybrid integrated with 180-nm silicon-on-insulator (SOI) Mach-Zehnder modulator (MZM). To recover and demodulate PAM4 data into dual-25-Gb/s nonreturn to zero (NRZ) streams for the co-designed MZM digital-analog converter (DAC), reference-less clock recovery (CDR) integrated, achieve high swing speed, made in distributed amplifier (DA), employing...
This article presents a reconfigurable silicon- photonics transmitter (TX) for short-reach optical interconnects. The proposed hybrid-integrated TX combines 65-nm CMOS driver with 180-nm SOI-CMOS silicon-photonic Mach-Zehnder Modulator (MZM). integrated in- segment fractional-UI spaced feed-forward equalizer (FFE) is to support the non-return-zero (NRZ) signaling, electrical- and optical-domain 4-level pulse-amplitude modulation (PAM-4) signaling. employs distributed topology achieve high...
We demonstrate a co-designed optical receiver, which is hybrid-integrated with silicon-photonic photodetector (PD) and silicon-germanium (SiGe) trans-impedance amplifier (TIA). Accurate equivalent circuit models of PD electrical parasitic chip-on-board (COB) assembly are built for co-simulation TIA. Inductive peaking equalizer (EQ) techniques proposed in the design TIA to extend bandwidth receiver. The measured 3-dB optical-to-electrical (O-E) receiver above 36.8 GHz 36 GHz, respectively....
This paper presents a dual 28Gb/s modulator driver with on-chip PAM4 clock and data recovery (CDR) in 40nm CMOS. Used the 400G Ethernet, 56Gb/s signal is recovered by CDR demodulates into dual-28Gb/s NRZ streams to drive silicon photonic MZM DAC. Push-pull cells are employed reuse current for power saving high-swing output. A digital-assisted distributed topology proposed, extending bandwidth enabling low-power flexible pre-emphasis within each segment. Precise retiming implemented phase...
This paper presents a fully differential two-step columnparallel successive approximation register/single-slope analog-to-digital converter (SAR/SS ADC) for CMOS image sensor (CIS). The ADC consists of high 6-bit SAR and low SS ADC. sampling circuit eliminates the fixed offset switch, reduces nonlinear errors, improves signal to noise ratio. is designed in UMC 0.11 μm process. has nonlinearity -0.25/+0.25 LSB integral -0.38/+0.56 LSB. signal-to-noise distortion ratio 73.0 dB spurious free...
This paper presents a chipset of multi-channel vertical-cavity-surface-emitting laser (VCSEL) driver and trans-impedance amplifier (TIA) in 180-nm SiGe BiCMOS. Targeting 400G-1.6T short-reach applications, the high-speed linear gain is developed for four four-level pulse amplitude modulation (PAM-4). The VCSEL employs second-order continuous-time equalizer to compensate non-linear input channel loss, while exploiting an RC-degenerated output stage with inductive shunt peaking extend...
and Rest of World), € 9435(Europe), £ 7462 (UK).Prices are exclusive tax.Asia-Pacifi c GST
The explosive growth of the data-intensive AI computing demands for datacenter interconnects with ever-increasing bandwidth (BW). Traditional pluggable optical modules can hardly meet DC power and form-factor requirements by new 51.2T ethernet switch. By tightly integrating compact engine (OE) into switch package, on-board metal traces are mostly replaced fiber, which thereby saves signaling improves front-panel BW-density. Depicted in Fig. 1(a), each 3.2T OE employs 4 quad-lane transceivers...
US$15500 (US and Rest of World), € 10001(Europe), £ 7911 (UK
This paper introduces the design, analysis and simulation results of a driver for high-speed silicon photonic modulators. To achieve high swing linearity simultaneously, several broadband circuit topology techniques are employed, including pre-emphasis circuit, variable gain amplifier push-pull output stage. The is implemented in 130nm BiCMOS process, achieving 22GHz bandwidth, 4V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">PP</sub> swing,...