Shan Deng

ORCID: 0000-0003-1137-8626
Publications
Citations
Views
---
Saved
---
About
Contact & Profiles
Research Areas
  • Ferroelectric and Negative Capacitance Devices
  • Advanced Memory and Neural Computing
  • Ferroelectric and Piezoelectric Materials
  • Semiconductor materials and devices
  • Microwave Dielectric Ceramics Synthesis
  • MXene and MAX Phase Materials
  • Advanced ceramic materials synthesis
  • Layered Double Hydroxides Synthesis and Applications
  • Advanced Sensor and Energy Harvesting Materials
  • Electromagnetic wave absorption materials
  • Dielectric properties of ceramics
  • Cellular Automata and Applications
  • Concrete Corrosion and Durability
  • Thin-Film Transistor Technologies
  • Network Packet Processing and Optimization
  • ZnO doping and properties
  • Machine Learning and ELM
  • Neural Networks and Applications
  • Neural Networks and Reservoir Computing
  • Nanowire Synthesis and Applications
  • Anodic Oxide Films and Nanostructures
  • Minerals Flotation and Separation Techniques
  • Physical Unclonable Functions (PUFs) and Hardware Security
  • 2D Materials and Applications
  • Laser and Thermal Forming Techniques

Nanjing University of Chinese Medicine
2024-2025

University of Notre Dame
2024-2025

Rochester Institute of Technology
2020-2024

Guilin University of Technology
2022-2023

Pennsylvania State University
2021

National Cheng Kung University
2017

Mineral Resources
2015

Ritsumeikan University
2013

Southwest Jiaotong University
2011

Universidad del Noreste
2011

In this work, we developed a comprehensive model for ferroelectric FET (FeFET), which can capture all the essential behaviors. Unlike previous models, describe only subset but not reported behaviors, proposed can: i) predict device performance with geometry scaling; ii) quantify device-to-device variation iii) exhibit stochasticity during single domain switching; and iv) accumulation of switching probability applied pulse trains. This would enable researchers to explore wide range FeFET...

10.1109/vlsitechnology18217.2020.9265014 article EN 2020-06-01

Content addressable memory (CAM) is widely used for data-centric computing its massive parallelism and pattern matching capability. Though the CAM density has been improved by replacing area-consuming SRAM with compact emerging nonvolatile memories (NVMs), implementation limited to single level cell. To further boost data-intensive workloads, exploiting multi-level cell NVMs highly desirable. In this work, we demonstrate: 1) a novel scalable ultra-compact multi-bit 2FeFET1T design based on...

10.1109/iedm13553.2020.9372119 article EN 2021 IEEE International Electron Devices Meeting (IEDM) 2020-12-12

Harnessing its analog threshold voltage (V <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">TH</inf> ) states, ferroelectric FET (FeFET) has found wide applications as multi-level cells and synaptic weight for in-memory computing. However, the origin of <tex xmlns:xlink="http://www.w3.org/1999/xlink">$V$</tex> states are not well understood. Moreover, channel percolation is predicted, which could significantly limit number due to abrupt V change...

10.1109/iedm19574.2021.9720631 article EN 2021 IEEE International Electron Devices Meeting (IEDM) 2021-12-11

In this work, a comprehensive study of charge trapping and de-trapping dynamics is performed on n-channel ferroelectric field-effect transistors (nFeFETs) pFeFETs. It discovered that: 1) the degree depends substrate that nFeFETs exhibit significant electron but negligible hole during memory write while pFeFETs much less when heavily stressed; 2) due to enhanced electric field in interlayer semiconductor, like initial polarization states (i.e., initialized by pulse same polarity as pulse)...

10.1109/ted.2022.3143485 article EN IEEE Transactions on Electron Devices 2022-01-29

Content addressable memory (CAM) is widely used in associative search tasks due to its parallel pattern matching capability. As more complex and data‐intensive emerge, it becoming increasingly important enhance CAM density for improved performance better area efficiency. To reduce the overheads, various nonvolatile (NVM) devices, such as ferroelectric field‐effect transistors (FeFETs), are design. Herein, a novel ultracompact 1FeFET design that enables in‐memory hamming distance calculation...

10.1002/aisy.202200428 article EN cc-by Advanced Intelligent Systems 2023-04-07

In this work, we evaluate the role of polarization switching and charge trapping in operation ferroelectric FET (FeFET) through combined experimental characterization comprehensive modeling. We are demonstrating that: 1) significant gap quasi-static split-CV (QSCV) small signal CV is fundamental not indicative trapped density. This because QSCV senses irreversible while mainly probes reversible domain wall displacement under ac excitation, theoretically yielding different scales response two...

10.1109/iedm13553.2020.9371999 article EN 2021 IEEE International Electron Devices Meeting (IEDM) 2020-12-12

An optimization principle for ferroelectric FET (FeFET), centered around charge matching between the and its underlying semiconductor, is theoretically investigated. This letter shows that, by properly reducing polarization background dielectric constant, can be improved to enable simultaneously: i) reduction of interlayer semiconductor electric fields during programming, reading, retention, leading prolonged endurance retention; ii) improvement memory window; iii) suppression...

10.1109/led.2020.3011037 article EN publisher-specific-oa IEEE Electron Device Letters 2020-07-21

In this work, a comprehensive study of random spatial fluctuation the ferroelectric (FE) phase and dielectric (DE) in FeFETs is conducted to understand its impact on device variation. It found that: i) there exists certain DE percentage threshold that below which increase does not significantly memory window variation only above evident degradation can be observed; ii) increasing increases coercive field distribution further exacerbates variation, hence degrading sensing margin; iii)...

10.1109/led.2021.3087335 article EN publisher-specific-oa IEEE Electron Device Letters 2021-06-08

Deep random forest (DRF), which combines deep learning and forest, exhibits comparable accuracy, interpretability, low memory computational overhead to neural networks (DNNs) in edge intelligence tasks. However, efficient DRF accelerator is lagging behind its DNN counterparts. The key acceleration lies realizing the branch-split operation at decision nodes. In this work, we propose implementing through associative searches realized with ferroelectric analog content addressable (ACAM)....

10.1126/sciadv.adk8471 article EN cc-by-nc Science Advances 2024-06-05

In the pursuit of creating new structures with improved overall mechanical properties, we produced a duplex stainless steel both high strength and good plasticity, which combines in harmonized way refined microduplex structure coarse structure. This is accomplished by applying mixed process milling followed spark-plasma sintering for powder, leading to microstructure gradual continuous transition between ultra-fine-grained regions at microscale. type referred as Harmonic. The grain...

10.2320/matertrans.mh201321 article EN MATERIALS TRANSACTIONS 2013-01-01

Nanoelectronic devices emulating neuro-synaptic functionalities through their intrinsic physics at low operating energies is imperative toward the realization of brain-like neuromorphic computers. In this work, we leverage non-linear voltage dependent partial polarization switching a ferroelectric field effect transistor to mimic plasticity characteristics biological synapses. We provide experimental measurements synaptic for $28nm$ high-k metal gate technology based device and develop an...

10.1063/5.0064860 article EN Applied Physics Letters 2021-09-27

In this work, a compact and novel ferroelectric (FE) programmable majority gate is proposed its application in Binary Neural Network (BNNs) investigated. We demonstrate: i) by integrating N metal-ferroelectric-metal (MFM) capacitors on the of transistor (1T-N-MFM structure), nonvolatile (MAJ) that performs MAJ AND between input polarization realized; ii) validation functionality our 3-input through comprehensive theoretical experimental investigations; iii) implementation XNOR leverages only...

10.1109/iedm45625.2022.10019400 article EN 2022 International Electron Devices Meeting (IEDM) 2022-12-03

This letter proposes C <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> FeRAM, a 2T2C/cell ferroelectric compute-in-memory (CiM) scheme for energy-efficient and high-reliability edge inference transfer learning. With certain area overhead, FeRAM achieves the following highlights: (i) compared with FeFET/FeMFET, it disturb-free CiM much higher write endurance (equal to FeRAM), leading <inline-formula...

10.1109/led.2023.3274362 article EN IEEE Electron Device Letters 2023-05-10

To fully exploit the ferroelectric field effect transistor (FeFET) as compact embedded nonvolatile memory for various computing and storage applications, it is desirable to use a single FeFET (1T) unit cell arrange cells into an array. However, many write mechanisms 1T array reported in literature are yet be validated experimentally. In this work, we performed comprehensive experimental characterization on operations 1T- NOR AND using n-channel bulk FeFETs. We discovered that: 1)...

10.1109/ted.2022.3216819 article EN IEEE Transactions on Electron Devices 2022-11-04

Since the discovery of CMOS-compatible and highly scalable ferroelectric HfO2, there has been a significant revival interest in developing devices for high performance energy-efficient embedded nonvolatile memories. Multiple memory are under investigation by harnessing polarization states. These include FET (FeFET), capacitor based random access (FeRAM), tunnel junction (FTJ). Though underlying storage mechanisms same these devices, their sensing different. This difference leads to...

10.1145/3453688.3461743 article EN Proceedings of the Great Lakes Symposium on VLSI 2022 2021-06-18

Abstract Existing circuit camouflaging techniques to prevent reverse engineering increase circuit-complexity with significant area, energy, and delay penalty. In this paper, we propose an efficient hardware encryption technique minimal complexity overheads based on ferroelectric field-effect transistor (FeFET) active interconnects. By utilizing the threshold voltage programmability of FeFETs, run-time reconfigurable inverter-buffer logic, two FeFETs inverter, is enabled. Judicious placement...

10.1038/s41467-022-29795-3 article EN cc-by Nature Communications 2022-04-25
Coming Soon ...