This paper presents a low-dropout regulator (LDO) for portable applications with an impedance-attenuated buffer driving the pass device. Dynamically-biased shunt feedback is proposed in to lower its output resistance such that pole at gate of device pushed high frequencies without dissipating large quiescent current. By employing current-buffer compensation, only single realized within regulation loop unity-gain bandwidth and over 65deg phase margin achieved under full range load current...

This paper presents an efficiency-enhanced integrated full-wave CMOS rectifier for the transcutaneous power transmission in high-current biomedical implants. The comparator-controlled switches are developed to minimize voltage drop along conducting path while achieving unidirectional current flow. proposed unbalanced-biasing scheme also minimizes reverse leakage of under different input amplitudes, thereby optimizing efficiency. Moreover, is able self start and operates at low amplitudes....

An active-feedback frequency-compensation (AFFC) technique for low-power operational amplifiers is presented in this paper. With an mechanism, a high-speed block separates the low-frequency high-gain path and high-frequency signal such that high gain wide bandwidth can be achieved simultaneously AFFC amplifier. The stage network also reduces size of compensation capacitors overall chip area amplifier becomes smaller slew rate improved. Furthermore, presence left-half-plane zero proposed...

Two integrated high-speed gate drivers to enable high-frequency operation of synchronous rectifiers in high-voltage switching power converters are presented this paper. The first driver for a CMOS train consists capacitively coupled level shifter (CCLS) that offers negligible propagation delays and no static current consumption, requires only one off-chip capacitor high-side pMOS driving capability without any external floating supply. second low-power dynamically controlled (DCLS) with...

This paper presents a miniaturized wide-input-range integrated reconfigurable three-level dc-dc voltage regulator. A buck converter topology with zerovoltage switching (ZVS) is adopted to remove the dominant power loss under high-input-voltage condition, thereby enabling achieve high efficiency in megahertz range and reduce required values of passives. constant-frequency adaptive-on-time V <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup>...

Low-power analog driver based on a single-stage amplifier with an embedded current-detection slew-rate enhancement (SRE) circuit is presented. By developing systematic way to design both the response time and optimal sizing of driving transistors in SRE circuit, can be controlled turn or off properly. In addition, only dissipates low static power its transient responses are significantly improved without overshoot when large capacitive loads. Implemented 0.6-/spl mu/m CMOS process,...

A dual active-capacitive-feedback compensation (DACFC) scheme for low-power three-stage amplifiers with large capacitive loads is presented in this paper. Dual high-speed paths enable the non-dominant complex poles of amplifier to be located at high frequencies bandwidth extension under condition. The proposed DACFC also consists two left-half-plane (LHP) zeros that relax stability criteria further improving gain-bandwidth product (GBW) and reducing required capacitance amplifier. Moreover,...

This paper presents a multi-MHz buck regulator for portable applications using an auto-selectable peak- and valley-current control (ASPVCC) scheme. The proposed ASPVCC scheme can enable the current-mode to reduce settling-time requirement of current sensing by two times. In addition, dynamically biased shunt feedback technique is employed improve speed accuracy both peak valley sensors. With advanced sensors, thus operate at high switching frequencies with wide range duty ratios reducing...

This paper presents a reconfigurable switched-capacitor (SC) DC-DC regulator to simultaneously generate two different regulated output voltages for low-power applications. With capacitor and power switch sharing in the stage, area efficiency of proposed is improved. The stage can also be configured provide conversion ratios order maintain high input voltages. A sub-harmonic adaptive-on-time (SHAOT) control scheme developed regulate both outputs. automatically adjusts durations charge...

This paper presents a floating-buck dimmable LED driver for solid-state lighting applications. In the proposed driver, an adaptive timing difference compensation (ATDC) is developed to adaptively adjust off-time of low-side power switch enable achieve high accuracy average current over wide range input voltages and number output loads, fast settling time, operation frequency. The efficiency benefits from capabilities using synchronous rectifier having no sensing resistor in stage....

A dual-path amplifier topology with dual-loop parallel compensation technique is proposed for low-power three-stage amplifiers. By using two high-speed paths high-frequency signal propagation, there no passive capacitive feedback network loaded at the output. Both bandwidth and slew rate are thus significantly improved. Implemented in a 0.6-μm CMOS process, has over 100-dB gain, 7-MHz gain-bandwidth product, 3.3-V/μs average while only dissipating 330 μW 1.5 V, when driving 25-k/spl...

This paper presents a new compact on-chip current-sensing circuit to enable current-mode buck regulators operating at high switching frequency for reducing the inductor profile. A dynamically biased shunt feedback technique is developed in proposed current sensor push nondominant poles higher frequencies, thereby improving speed and stability of under wide range load currents. feedforward gain stage also increases dc loop-gain magnitude thus enhances accuracy sensing. regulator with has been...

A bulk voltage trimming offset calibration technique is presented for flash analog-to-digital converters (ADCs). Offset achieved by digitally adjusting the voltages of preamplifier input devices. Without introducing additional capacitive loading in analog path, this improves accuracy ADCs while not impairing their high-speed performance. 4-bit ADC 90-nm CMOS with proposed achieves 3.71 effective number bits (ENOB) at 5-GS/s sampling rate 2.5-GHz resolution bandwidth (ERBW). The generally...

This paper presents a switched-capacitor voltage doubler using pseudo-continuous control (PCC). The proposed PCC does not require extra power transistor to continuously regulate the output of doubler, thereby saving chip area. also allows operate at lower switching frequencies without sacrificing transient response. light-load efficiency regulated can thus be enhanced by reducing loss. In addition, three-stage switchable opamp with time-multiplexed active-feedback frequency compensation is...

This brief presents circuit techniques to improve the power efficiencies of a discontinuous-conduction mode (DCM) buck regulator for portable applications. A switched-capacitorcomparator-based adaptive dead-time control is developed provide fast and accurate sensing comparison optimizing switching timing transistors thus simultaneously minimizing losses caused by reverse inductor current, body-diode conduction, shoot-through current. new ringing suppression also proposed not affect during...

An auto-reconfigurable 2 <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">$\times$</tex> </formula> /3 switched-capacitor charge pump (SC-CP) for transcutaneous power transmission is presented in this paper. The proposed SC-CP can automatically configure its own voltage conversion ratio according to different input voltages by using the adaptive control circuitry such that DC/DC regulator maintain high...

This brief presents a high-frequency high-efficiency zero-voltage-switching (ZVS) synchronous noninverting buck-boost converter for tens-of-Watt applications. By using two pairs of small auxiliary inductors and capacitors, the proposed can achieve ZVS under different load currents without increasing voltage stress across power field-effect transistors. The switching loss is thus minimized to enable operation converter. be also configured into boost mode or buck with when input changes in...

Wireless power transfer (WPT) is a common non-intrusive approach to implantable biomedical devices. In the WPT system, tens-of-milliwatt receiver (RX) should offer small form factor and preferred provide two or more rails for supporting various functions. Conventionally, RX can be realized by rectifier AC-to-DC conversion followed single-inductor multiple-output (SIMO) converter generating different regulated DC voltages. Although rectifiers with high resonance frequency <tex...

A fully integrated soft-start circuit for voltage regulators is presented in this brief. strategy based on a linearly ramped-up reference adopted to prevent massive in-rush currents through the power device during start-up phase of regulator. The realized by compact on-chip circuit, which requires no external components and has minimal transistor overhead, thereby minimizing implementation area cost overall proposed been implemented 0.35-mum high-voltage complementary...

A high-voltage high-speed gate driver to enable synchronous rectifiers with zero-voltage-switching (ZVS) operation is presented in this paper. capacitive-coupled level-shifter (CCLS) developed achieve negligible propagation delay and static current consumption. With only 1 off-chip capacitor, the proposed possesses strong driving capability requires no external floating supply for high-side driving. dynamic timing control also not ZVS converter minimizing capacitive switching loss, but...

This paper presents an efficiency-enhanced low-profile zero-voltage-transition (ZVT) synchronous non-inverting buck-boost converter for 48-V tens-of-Watt output applications. By only using three auxiliary components shared between two switching nodes, zero-voltage (ZVS) of all four power switches and zero-current the switch are achieved in proposed to minimize loss. Compared with existing ZVT topologies, reduces required number components, thereby decreasing volume In addition, can be...

A wide-input-range DC-DC-based dimmable LED driver is presented in this paper. The proposed can be automatically configured to operate the soft-switching mode under high-voltage condition order minimize converter's dominant switching power loss. Adaptive resonant timing control developed enable proper dead-time generation for on-chip FETs both hard- and modes different input output voltages loss minimization. In driver, two low-power body-diode-based zero-voltage detectors an adaptive...

With more and functions in modern battery-powered mobile devices, enabling light-harvesting the power management system can extend battery usage time [1]. For both indoor outdoor operations of output range solar panel with size a touchscreen vary from 100s μW to Watt due irradiance-level variation. An energy harvester is thus essential achieve high maximum power-point tracking efficiency (η <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">T</sub>...

Wide input rails (12V to 100V) are common in today's automotive and industrial systems. Miniaturized DC-DC voltage regulators (VRs), which can provide a low-voltage regulated output from wide range deliver few Watts, essential these Wide-input-range integrated VRs, however have difficulty simultaneously achieve high frequency (HF) operation power efficiency. Previous hard-switching (HS) high-input-voltage (HV) buck only operate at low of 100s kHz order limit the dominant switching loss PSW,...