A5045798948- Carbon Nanotubes in Composites
- Semiconductor materials and devices
- Graphene research and applications
- Advancements in Semiconductor Devices and Circuit Design
- Advanced Memory and Neural Computing
- Analog and Mixed-Signal Circuit Design
- Ferroelectric and Negative Capacitance Devices
- Mechanical and Optical Resonators
- Molecular Junctions and Nanostructures
- Integrated Circuits and Semiconductor Failure Analysis
- Nanotechnology research and applications
- Advancements in Battery Materials
- Nanowire Synthesis and Applications
- Low-power high-performance VLSI design
- Advanced Antenna and Metasurface Technologies
- Silicon Carbide Semiconductor Technologies
- Quantum-Dot Cellular Automata
- Acoustic Wave Resonator Technologies
- Electromagnetic wave absorption materials
- Dielectric materials and actuators
- Transition Metal Oxide Nanomaterials
- Phase-change materials and chalcogenides
- Copper Interconnects and Reliability
- Surface Chemistry and Catalysis
- Radiation Effects in Electronics
University of Colombo
2025
University of Colorado Boulder
2023
National Institute of Standards and Technology
2023
Stanford University
2011-2016
Integrated Systems Solutions (United States)
2014
Intel (United States)
2014
Samford University
2013
Lehigh University
2007-2009
Carbon nanotube (CNT) field-effect transistors (CNFETs) are a promising emerging technology projected to achieve over an order of magnitude improvement in energy-delay product, metric performance and energy efficiency, compared silicon-based circuits. However, due substantial imperfections inherent with CNTs, the promise CNFETs has yet be fully realized. Techniques overcome these have yielded results, but thus far only at large nodes (1 μm device size). Here we demonstrate first very scale...
We present a measurement technique, which we call the Pulsed Time-Domain Measurement, for characterizing hysteresis in carbon nanotube field-effect transistors, and demonstrate its applicability broad range of 1D 2D nanomaterials beyond nanotubes. The Measurement enables quantification (density, energy level, spatial distribution) charged traps responsible hysteresis. A physics-based model charge trapping process transistor is presented experimentally validated using Measurement. Leveraging...
Single-wall carbon nanotubes (SWCNTs) have great potential to become the channel material for future high-speed transistor technology. However, as-made nanotube field effect transistors (CNFETs) are p-type in ambient, and a consistent reproducible n-type (CNT) doping technique has yet be realized. In addition, very large scale integration (VLSI) of CNT transistors, it is imperative use solid-state method that can applied on wafer scale. Herein we present novel, VLSI-compatible fabricate...
Semiconducting single-walled carbon nanotubes (SWCNTs) have great potential of becoming the channel material for future thin-film transistor technology. However, an effective sorting technique is needed to obtain high-quality semiconducting SWCNTs optimal device performance. In our previous work, we reported a dispersion that relies on regioregular poly(3-dodecylthiophene) (rr-P3DDT) form hybrid nanostructures. this study, demonstrate scalability those sorted CNT composite structures arrays...
A novel one-transistor-n-resistors (1TnR) array architecture is demonstrated as a cost-effective solution to the sneak path problem in large-scale cross-point memory arrays. In 1TnR array, single transistor (1T) with 1D channel effectively controls number of resistive switching nonvolatile (NVM) cells (nR) while limiting leakage current within without sacrificing device density. To maximize these benefits, carbon nanotube FET (CNFET) employed selection device, due its near-ballistic...
This paper summarizes a multi-disciplinary effort to realize the high expectations of use carbon nanotube (CNT) as material for highly energy-efficient future digital systems. Today CNTs are grown on full wafers, aligned in one direction, and subsequently transferred target substrate multiple times increased CNT density. Device level performance transistor (CNFET) rivals best silicon transistor. Inherent imperfections such mis-positioned metallic have been overcome through combination...
Single-wall carbon nanotubes (SWCNTs) have great potential to become the channel material for future high-speed transistor technology. However, realize a nanotube field effect (CNTFET) with excellent gate control, high-k dielectrics between CNT and metal must superb electrical properties extremely high uniformity. Thus it is essential understand interactions materials SWCNTs effectively control characteristics. In this study, we investigate effects of atomic layer deposited (ALD) (Al2O3...
BTI recovery in tri-gate devices matches data and model predictions from planar devices, indicating a consistent physical basis for the mechanism no influence transistor architecture features such as crystal orientation, confinement, vertical sidewalls. This consistency enables extending existing models established on to capture temperature voltage dependencies of recovery. A new experimental technique allows extraction an effective activation energy The observation complete demonstrates...
In this paper, we present the electrical characteristics of air-stable n-type CNFETs, fabricated using a silicon technology compatible fabrication process. Both FETs and p-type have been on same wafer. With previously-published methods for scalable removal m-CNTs, demonstrated complementary CNFET inverters as well 2-stage inverter chain CNFETs only.
Carbon Nanotube Field-Effect Transistors (CNFETs) are excellent candidates for building highly energy-efficient digital systems. However, imperfections inherent in carbon nanotubes (CNTs) pose significant hurdles to realizing practical CNFET circuits. In order achieve VLSI systems the presence of these imperfections, careful orchestration design and processing is required: from device circuit integration, all way large-scale system optimization. this paper, we summarize key ideas that...
Carbon Nanotube Field-Effect Transistors (CNFETs) are excellent candidates for building highly energy-efficient digital systems. However, imperfections inherent in carbon nanotubes (CNTs) pose significant hurdles to realizing practical CNFET circuits. In order achieve VLSI systems the presence of these imperfections, careful orchestration design and processing is required: from device circuit integration, all way large-scale system optimization. this paper, we summarize key ideas that...
Abstract Flexible and stretchable materials have attracted significant interest in wearable electronics bioengineering fields. Recent developments also incorporate embedded microwave circuits systems with engineered flexible that operate over a broad frequency range (≈1–100 GHz). Herein, simple flip‐chip technique is used to evaluate frequency‐dependent electromagnetic properties of applied absorbers based on self‐biased barium hexaferrite composites. On‐wafer error correction de‐embedding...
Phase-change memory (PCM) cells on a single carbon nanotube field-effect transistor (CNFET) are demonstrated toward the realization of 1TnR array architecture. The use CNFET as one-dimensional selector, which exhibits ultra-low leakage (< 1 pA) and large ON/OFF ratio (> 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">6</sup> ) at high current densities, enables cost-effective PCM cell to operate with wide voltage margin in 2D arrays. Uniform...
We present a novel, VLSI compatible technique to fabricate n-type carbon nanotube (CNT) transistors using yttrium oxide as gate dielectric. Wafer-scale, aligned CNT with (Y <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</inf> O xmlns:xlink="http://www.w3.org/1999/xlink">x</inf> ) dielectrics exhibit behavior I xmlns:xlink="http://www.w3.org/1999/xlink">on</inf> /I xmlns:xlink="http://www.w3.org/1999/xlink">off</inf> of 10 <sup...
Graphene and carbon nanotubes (CNTs) have gained significant attention due to their potential applications in high performance electronics. In order replace or integrate the current silicon based technology with electronics one should study reliability of those devices understand feasibility applications. this report we present CVD synthesized graphene for transistor interconnects also investigate a metal-oxide CNT doping technique that is an active area research community.
By surmounting various obstacles across the spectrum from material synthesis to device fabrication and circuit considerations, we provide a solid foundation so that carbon-based technology can move forward towards vision of engineering VLSI circuits, but further research is still needed realize potential such as higher density CNT synthesis, better metal CNT/graphene contacts, air-stable doping CNT.
We have performed 1/f noise characterizations on both scaled high-K, metal-gate, NMOS transistors and NSONOS NVSMs. Experimental results indicate a trap density in high-K devices, which is several orders of magnitude higher than The increased devices remains reliability issue for device engineering circuit design.
We present incremental advances in carbon nanotube synthesis and graphene applications. These include novel lateral growth of nanotubes with fair alignment, demonstrations limited control chirality distribution, a study the reliability robustness graphene, characterization atomic layer deposition onto nanotubes.
Abstract not Available.
The existing evaluations of the semiconducting/metallic properties carbon nanotube (CNT) synthesis do not take into account CNT variation and simply characterize material with only one parameter p semi : percentage semiconducting CNTs. Specifically, this figure merit does consider intermediate-on–off-ratio CNTs (semiconducting poor I on / off ), yet, such can have a large impact device- circuit-level performance. Inspired by complementary metal–oxide–semiconductor (CMOS) community, we...