Alvin Tang

ORCID: 0000-0003-4293-2917
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About
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Research Areas
  • Graphene research and applications
  • 2D Materials and Applications
  • Ferroelectric and Negative Capacitance Devices
  • Advanced Memory and Neural Computing
  • Molecular Junctions and Nanostructures
  • MXene and MAX Phase Materials
  • Carbon Nanotubes in Composites
  • Nanowire Synthesis and Applications
  • Surface Chemistry and Catalysis
  • Advanced Sensor and Energy Harvesting Materials
  • Analytical Chemistry and Sensors
  • Low-power high-performance VLSI design
  • Advancements in Semiconductor Devices and Circuit Design
  • Copper Interconnects and Reliability

Stanford University
2013-2023

Samford University
2013

Creating high-quality, low-resistance contacts is essential for the development of electronic applications using two-dimensional (2D) layered materials. Many previously reported methods lowering contact resistance rely on volatile chemistry that either oxidize or degrade in ambient air. Nearly all efforts have been conducted only a few devices with mechanically exfoliated flakes which not amenable to large scale manufacturing. In this work, Schottky barrier heights metal-MoS2 fabricated from...

10.1021/acs.nanolett.5b03727 article EN Nano Letters 2015-12-23

We present a measurement technique, which we call the Pulsed Time-Domain Measurement, for characterizing hysteresis in carbon nanotube field-effect transistors, and demonstrate its applicability broad range of 1D 2D nanomaterials beyond nanotubes. The Measurement enables quantification (density, energy level, spatial distribution) charged traps responsible hysteresis. A physics-based model charge trapping process transistor is presented experimentally validated using Measurement. Leveraging...

10.1021/acsnano.6b00792 article EN ACS Nano 2016-03-22

While two-dimensional (2D) semiconductors like Mos2 are promising for applications in nanoscale transistors, their performance is limited by contacts. Here, we report contact resistance as low 190 Ω·µm In/Au alloy and 270 Ω·µmfor Sn/ Au contacts to monolayer Mos2, which among the best reported date. We perform a statistical study of 720 transistors comparing different schemes, re-vealing both 'best' 'average' alloyed contacts, well distribution, first time. Material characterization confirms...

10.1109/iedm19574.2021.9720609 article EN 2021 IEEE International Electron Devices Meeting (IEDM) 2021-12-11

Emerging data-intensive computation has driven the advanced packaging and vertical stacking of integrated circuits, for minimized latency energy consumption. Yet a monolithic three-dimensional (3D) structure with interleaved logic high-density memory layers been difficult to achieve due challenges in managing thermal budget. Here we experimentally demonstrate 3D integration atomically-thin molybdenum disulfide (MoS2) transistors resistive random-access memories (VRRAMs), MoS2 stacked between...

10.1038/s41467-023-41736-2 article EN cc-by Nature Communications 2023-09-23

Two-dimensional (2D) semiconductors have been proposed for heterogeneous integration with existing silicon technology; however, their chemical vapor deposition (CVD) growth temperatures are often too high. Here, we demonstrate direct CVD solid-source precursor synthesis of continuous monolayer (1L) MoS$_2$ films at 560 C in 50 min, within the 450-to-600 C, 2 h thermal budget window required back-end-of-the-line compatibility modern technology. Transistor measurements reveal on-state current...

10.1021/acsami.1c06812 article EN ACS Applied Materials & Interfaces 2021-08-24

A different mechanism was found for Cu transport through multi-transferred single-layer graphene serving as diffusion barriers on the basis of time-dependent dielectric breakdown tests. Vertical and lateral dominates at stress electric field regimes. The classic E-model modified to project quantitatively effectiveness barrier low based high-field accelerated data. results are compared industry-standard material TaN. 3.5 Å shows mean time-to-fail comparable 4 nm TaN, while two-time three-time...

10.1021/acsnano.5b03038 article EN ACS Nano 2015-07-29

High-density memory arrays require selector devices, which enable selection of a specific cell within array by suppressing leakage current through unselected cells. Such devices must have highly nonlinear current–voltage characteristics and excellent endurance; thus selectors based on tunneling mechanism present advantages over those the physical motion atoms or ions. Here, we use two-dimensional (2D) materials to build an ultrathin (three-monolayer-thick) tunneling-based selector. Using...

10.1021/acsnano.1c00002 article EN ACS Nano 2021-05-04

Nanoelectronics based on 2-dimensional layered materials is a field of rapidly growing interest. In particular, graphene and transition metal dichalcogenides (TMD) exhibit remarkable properties that can be exploited for many applications. Most electronic devices 2D materials, however, focus the material: are usually utilized as semiconducting pathways carriers (e.g. channels in transistors) or conductors interconnects, transparent conductor). this work, we investigate use interfacial layers...

10.1109/e3s.2013.6705883 article EN 2013-10-01

Two-dimensional (2D) semiconductors are promising candidates for scaled transistors because they immune to mobility degradation at the monolayer limit. However, sub-10 nm scaling of 2D semiconductors, such as MoS2, is limited by contact resistance. In this work, we show first time a statistical study Au contacts chemical vapor deposited MoS2 using transmission line model (TLM) structures, before and after dielectric encapsulation. We report resistance values low 330 ohm-um, which lowest...

10.1109/iitc51362.2021.9537515 preprint EN 2021-07-06

We present incremental advances in carbon nanotube synthesis and graphene applications. These include novel lateral growth of nanotubes with fair alignment, demonstrations limited control chirality distribution, a study the reliability robustness graphene, characterization atomic layer deposition onto nanotubes.

10.1149/05301.0027ecst article EN ECS Transactions 2013-05-02

Abstract not Available.

10.1149/ma2013-01/17/737 article EN Meeting abstracts/Meeting abstracts (Electrochemical Society. CD-ROM) 2013-03-08

Flexible electronics could greatly benefit from the realization of large-scale field-effect transistors (FETs) based on two-dimensional (2D) materials that exhibit high carrier mobility, flexibility, and transparency [1]. As high-quality 2D are synthesized at temperatures <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$&gt; 500\ {}^{\circ}\mathrm{C}$</tex> , they must rely scalable processes for transfer to flexible substrates after growth....

10.1109/drc46940.2019.9046389 article EN 2019-06-01

The inferior electrical contact to two-dimensional (2D) materials is a critical challenge for their application in post-silicon very large-scale integrated circuits. Electrical contacts were generally related resistive effect, quantified as resistance. With systematic investigation, this work demonstrates capacitive metal-insulator-semiconductor (MIS) field-effect at the 2D materials: depletes or accumulates charge carriers, redistributes voltage potential, and give rise abnormal current...

10.48550/arxiv.2101.09487 preprint EN other-oa arXiv (Cornell University) 2021-01-01
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