A5101471364- Particle Detector Development and Performance
- Advancements in PLL and VCO Technologies
- Photonic and Optical Devices
- CCD and CMOS Imaging Sensors
- Semiconductor Lasers and Optical Devices
- Radiation Detection and Scintillator Technologies
- Semiconductor materials and devices
- Analog and Mixed-Signal Circuit Design
- Radiation Effects in Electronics
- Radio Frequency Integrated Circuit Design
- Advancements in Battery Materials
- Synthesis and properties of polymers
- Silicone and Siloxane Chemistry
- Semiconductor Quantum Structures and Devices
- Advanced battery technologies research
- Particle physics theoretical and experimental studies
- Advancements in Semiconductor Devices and Circuit Design
- Optical Network Technologies
- Silicon Carbide Semiconductor Technologies
- Atomic and Subatomic Physics Research
- Supercapacitor Materials and Fabrication
- Advanced Photonic Communication Systems
- Optical Systems and Laser Technology
- Infrared Target Detection Methodologies
- VLSI and Analog Circuit Testing
Fermi National Accelerator Laboratory
2019-2024
Southern Methodist University
2016-2024
University of Chinese Academy of Sciences
2021-2024
Institute of Chemistry
2021-2024
Chinese Academy of Sciences
2015-2024
Nanjing Tech University
2020-2023
National Astronomical Observatories
2016-2022
Tongji University
2017-2021
Anhui University of Technology
2020
Materials Science & Engineering
2020
A novel 8-hydroxyquinolinate-based metal–organic framework exhibits excellent sensing performance toward Fe<sup>3+</sup>, Cr<sub>2</sub>O<sub>7</sub><sup>2−</sup> and nitroaromatic explosives.
A series of BCB-functionalized organosilicon materials were prepared by a facile Piers–Rubinsztajn polycondensation and Heck coupling post-modification method, rendering simple efficient option for advanced packaging dielectric materials.
CMOS Monolithic Active Pixel Sensors (MAPS) have demonstrated their strong potential for tracking devices, particularly flavour tagging. They are foreseen to equip several vertex detectors and beam telescopes. Most applications require high read-out speed, which imposes sensors feature digital output with integrated zero suppression. The most recent development of MAPS at IPHC IRFU addressing this issue will be reviewed. design architecture, combining pixel array, column-level discriminators...
We present the design and test results of a Time-to-Digital-Converter (TDC). The TDC will be part readout ASIC, called ETROC, to read out Low-Gain Avalanche Detectors (LGADs) for CMS Endcap Timing Layer (ETL) High-Luminosity LHC upgrade. One challenges ETROC is that required consume less than 200 W each pixel at nominal hit occupancy 1%. To meet low-power requirement, we use single delay line both Time Arrival (TOA) over Threshold (TOT) measurements without control. A double-strobe...
Self-defense mainlobe interference and radar echo signals generated by real targets are same spatial angle, which seriously affect the performance, so self-defense suppression is one of hot spots difficulties in current field. In order to solve this issue, an approach self-dense proposed. Firstly, pulse suffered rejected. Then, based on modified iterative method with adaptive threshold, interfered reconstructed along slow time. Simulation results indicate that proposed not only could...
A bis-stabilized interface strategy has been proposed to prepare high-performance low-dielectric (low-k) benzocyclobutene (BCB)-based nanocomposites by a rational-designed and facile-synthesized difunctional silane modifier. Hollow silica nanoparticles (HSNs) can be efficiently surface-modified with the evenly dispersed chemically cross-linked BCB resin matrix during post-thermal curing process, finally obtaining series of HSNs-doped organic–inorganic nanocomposites. The dielectric...
Developing benzocyclobutene (BCB) nanocomposites with ultra-small inorganic sizes represents a formidable challenge, although it offers great potential to produce materials customizable structural and rich functional properties. In this study, we present "bottom-up" design strategy for creating cross-linked highly dispersed nanodomains, such as organoalkoxysilane. This approach leverages ring-opening metathesis polymerization (ROMP) thermally induced cycloaddition reactions embed oligomeric...
Designed and manufactured in a commercial CMOS 0.35 μm OPTO process for equipping the EUDET beam telescope, MIMOSA26 is first reticule size pixel sensor with digital output integrated zero suppression. It features matrix of pixels 576 rows 1152 columns, covering an active area ~224 mm. A single point resolution about 4 was obtained pitch 18.4 μm. Its architecture allows fast readout frequency ~10 k frames/s. The paper describes chip design, test major characterisation outcome.
We present a low-noise Charge-Sensitive Amplifier (CSA) manufactured in standard 0.35 μm CMOS process. The CSA is part of an integrated sensor named Topmetal-S, array which forms charge readout plane high-pressure gaseous TPC for 0νββ search. A single-ended folded cascode amplifier with 73 dB open-loop gain and 340 MHz gain-bandwidth product the main amplification stage this CSA. Measurements show that conversion 3 fF feedback capacitor 163 mV/fC. With 5 pF detector capacitance, achieved...
This paper presents the designs and test results of two radiation tolerant 4 × 10 Gb/s vertical cavity surface emitting laser (VCSEL) array drivers VLAD lpVLAD, both fabricated in a 1.2 V 65 nm CMOS technology. adopts power efficient bandwidth-boost technology, lpVLAD employs novel high-efficiency output structure to achieve an ultra-low consumption 2.2 mW/Gb/ch with 2 mA bias current 6 modulation current. Both are optically tested passing eye mask all channels active under total dose up 350...
Open-framework chalcogenides are potential electrode materials for sodium-ion batteries (SIBs) due to their architectures with fast-ion conductivity. Herein, we report on the successful synthesis of open-framework Cu-Ge-based [Cu 8 Ge 6 Se 19 ](C 5 H 12 N) (CGSe) and research energy storage application as SIB anodes first time. As a result, CGSe anode exhibited good electrochemical performances such high reversible capacity (463.3 mAh g −1 ), excellent rate performance, considerable cycling...
Abstract The time-to-digital-converter (TDC) using uncontrolled delay lines has a simple structure and finer measurement precision since the cells are pure digital gates that operate at maximum speed. For every incoming hit, two “snapshots” of line taken by register array with strobes separated known time interval. With measurements, propagation delays each cell in can be calibrated for operating temperature voltage. measurements also averaged to improve TDC precision. We will discuss...
Abstract This paper presents the design and test results of a Gigabit Cable Receiver ASIC called GBCR for HL-LHC upgrade ATLAS Inner Tracker (ITk) pixel detector. Three prototypes (GBCR1, GBCR2, GBCR3) have been designed in CERN-identified 65 nm CMOS technology. receives seven (GBCR2) or six (GBCR3) channels (RX) each at 1.28 Gbps from front-end readout chip RD53B via flex cables up to 1 meter Twinax 5 meters sends equalized retimed signals lpGBT. Both GBCR2 GBCR3 ASICs two transmitting (TX)...
This paper proposes a loop-free self-balancing technique of flying capacitor for three-level buck converter. The pro-posed converter utilizes two balancing switches in circuit, which can adaptively change the series and parallel structure capacitors at different working phases. In operating modes duty cycle less than 0.5 greater 0.5, stabilize voltages <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$V_{IN}\mathbf{/2}$</tex> without any feedback...
In this paper, a new design of on-chip CMOS voltage regulator, which provides two stable power supplies to charge pump and controlled oscillator (VCO) in phase-locked loop (PLL), is presented. A supply noise rejection (PSNR) whose peaking less than -40dB achieved over the entire frequency spectrum for VCO supply. The regulator maximum 14mA current, static current about [email protected] at 3.3V. Based on proposed PLL clock generator has been developed measured AMS process. Operating 160MHz,...