A5038163332- Semiconductor materials and devices
- Advancements in Semiconductor Devices and Circuit Design
- Radio Frequency Integrated Circuit Design
- Radiation Effects in Electronics
- GaN-based semiconductor devices and materials
- Silicon Carbide Semiconductor Technologies
- Photonic and Optical Devices
- Ga2O3 and related materials
- Semiconductor Quantum Structures and Devices
- Microwave Engineering and Waveguides
- Low-power high-performance VLSI design
- Advanced Power Amplifier Design
- Ferroelectric and Negative Capacitance Devices
- 3D IC and TSV technologies
- Integrated Circuits and Semiconductor Failure Analysis
- Advanced DC-DC Converters
- Electromagnetic Compatibility and Noise Suppression
- Plasma Diagnostics and Applications
- Advanced Memory and Neural Computing
- Embedded Systems Design Techniques
- Advanced Wireless Communication Techniques
- Advanced MIMO Systems Optimization
- Wireless Communication Networks Research
- Analog and Mixed-Signal Circuit Design
- Electrostatic Discharge in Electronics
Leibniz Institute for High Performance Microelectronics
2010-2018
GlobalFoundries (Germany)
2016
Institut für Solartechnologien (Germany)
2009-2014
Foundation for Human Potential
2014
Kirchhoff (Germany)
2006-2008
Ferdinand-Braun-Institut
2006-2008
Dialog Semiconductor (Germany)
2004
Motorola (United States)
2002
IBM (United States)
2002
22FDX™ is the industry's first FDSOI technology architected to meet requirements of emerging mobile, Internet-of-Things (IoT), and RF applications. This platform achieves power performance efficiency a 16/14nm FinFET in cost effective, planar device architecture that can be implemented with ~30% fewer masks. Performance comes from second generation transistor, which produces nFET (pFET) drive currents 910μ/μm (856μ/μm) at 0.8 V 100nA/μm Ioff. For ultra-low applications, it offers low-voltage...
A SiGe HBT technology featuring f <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">T</sub> /f xmlns:xlink="http://www.w3.org/1999/xlink">max</sub> /BV xmlns:xlink="http://www.w3.org/1999/xlink">CEO</sub> =300GHz/500GHz/1.6V and a minimum CML ring oscillator gate delay of 2.0 ps is presented. The speed-improvement compared to our previous generations originates from lateral device scaling, reduced thermal budget, changes the emitter base...
A 0.13 μm SiGe BiCMOS technology for millimeter-wave applications is presented. This features high-speed HBTs with peak transit frequencies <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">f</i> <sub xmlns:xlink="http://www.w3.org/1999/xlink">T</sub> of 240 GHz, maximum oscillation xmlns:xlink="http://www.w3.org/1999/xlink">max</sub> 330 and breakdown voltages BV xmlns:xlink="http://www.w3.org/1999/xlink">CEO</sub> 1.7 V along high-voltage ( = 50...
An experimental SiGe HBT technology featuring fT/fmax/BVCEO = 505 GHz/720 GHz/1.6 V and a minimum CML ring oscillator gate delay of 1.34 ps is presented. The improved speed compared to our previous developments originates primarily from an optimized vertical profile, additional decrease the base emitter resistance which made possible by combining millisecond annealing with low-temperature backend, lateral device scaling.
A 0.13 mum SiGe BiCMOS technology for millimeter wave applications is presented. This features high-speed HBTs (f <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">T</sub> =240 GHz, f xmlns:xlink="http://www.w3.org/1999/xlink">max</sub> =330 BV xmlns:xlink="http://www.w3.org/1999/xlink">CEO</sub> =1.7 V) along with high-voltage =50 =130 =3.7 integrated in a dual-gate, triple-well RF-CMOS process. Ring oscillator gate delays of 2.9 ps, low-noise...
Operation of AlGaN/GaN HFETs in space was simulated by irradiation with protons and heavy ions at 68 MeV 2MeV fluences up to 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">13</sup> cm xmlns:xlink="http://www.w3.org/1999/xlink">-2</sup> . Before after dc pulsed I-V characteristics the AlGaN HFET devices were measured. A thick GaN reference layer characterized photoluminescence, X-ray diffraction Hall measurements before irradiation. The...
The operation of SiGe HBTs at cryogenic temperatures is investigated experimentally and theoretically. It demonstrated that the collector current caused by electron tunneling through base. temperature dependence transistor characteristics reveals a transition from conventional thermally activated transport room to dominated temperatures. Experimental results are presented for with peak gain 8000 300 K 45000 10 K.
This paper investigates high-current and electrostatic discharge (ESD) phenomena in pseudomorphic epitaxial-base silicon-germanium (SiGe) heterojunction bipolar transistors (HBTs) base-collector, base-emitter, collector-emitter collector-to-substrate configurations. Transmission line pulse (TLP) ESD human body model (HBM) wafer-level reliability testing of SiGe HBTs is completed for characterization evaluation the robustness a BiCMOS technology.
Applications such as radar imaging and wideband communications are driving the research on millimeter-wave circuits. For some applications SiGe hetero junction bipolar transistors (HBTs) limited in output power. III-V technologies (like InP) can realize devices showing a high product of peak transit frequency multiplied with open base breakdown voltage. Therefore, merging qualities both Si technology will enable new class high-performance ICs. Our approach combines an InP-DHBT...
Addressing applications such as high performance RF power amplifiers and DC/DC converters with conversion efficiency we demonstrate a cost effective integration of complementary medium voltage LDMOS module in 0.25 μm base CMOS flow. The the NLDMOS PLDMOS transistors requires just three additional mask steps. has an excellent large signal up to 6 GHz. Key figures at 1 dB gain compression are 20 gain, 35 % added 0.4 W/mm density. First prototypes fabricated 12 V down GHz verify DC devices.
In order to improve the total ionizing dose (TID) and single event upset (SEU) radiation tolerance of bulk CMOS technologies we applied two constructive measures. TID induced source-drain leakage is suppressed by a junction isolation (JI) source drain regions using silicide blocked well regions. To decrease susceptibility against SEU introduced redundancy on transistor level, where each MOS replaced stack spatially separated transistors which share common gate (CG). The hardness device...
We have investigated the ionization damage by <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">60</sup> Co gamma irradiation in 0.13- and 0.25-μm SiGe heterojunction bipolar transistors (HBTs). Both technologies feature high-speed HBTs (HS-HBTs) together with high-voltage (HV-HBTs). Base current degradation increasing total dose is studied. An identical behavior of corresponding HS-HBT HV-HBT found for operation forward mode probing emitter-base...
In this article we report on the capability of integrated LDMOS transistors for power amplifiers in 10 gigabit per second (Gbps) communication systems, smart systems and X-band amplifiers. The switched mode properties amplifier were evaluated using a 10.3125 Gbps pseudo random bit error sequence (PRBS) signal. A test mask according to IEEE P802.3aq 10GBASE-LRM Ethernet standard was applied evaluate recorded eye diagram. No single hit detected forbidden regions after measuring 6 million data...
Abstract AlGaN/GaN heterojunction field effect transistors (HFETs) have been irradiated with protons at 68 MeV and 2 fluences up to 10 13 cm –2 in order simulate operation space. Hall measurements, dc characteristics RF load pull measurements GHz do not reveal significant changes indicating the suitability of for reliable (© 2006 WILEY‐VCH Verlag GmbH & Co. KGaA, Weinheim)
The effect of proton, carbon, oxygen and krypton irradiation on AlGaN HFET devices has been studied. Irradiation was performed at 68 120 MeV with fluences in the range from 1 × 107 to 1013 cm−2. Before after irradiation, dc pulsed I–V characteristics, loadpull S-parameters were measured. A thick GaN reference layer characterized by x-ray diffraction, photoluminescence Hall measurements before irradiation. Proton, carbon show no degradation while shows a small change fluence 1010 cm−2 device...
In this work the electrical performance of a Rad- Hard designed 1T-1R device based on combination an Enclosed Layout Transistor (ELT) and TiN/HfO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> /Ti/TiN resistor is presented for first time. Moreover, architectural solution 1Mbit radiation hard RRAM array implementation proposed.
In this work a 3.97 /spl mu/m/sup 2/ 6T CMOS SRAM bitcell technology has been developed using logic based platform incorporating self-aligned local interconnect and copper metallization. This 0.20 mu/m process is suitable for stand-alone applications as well embedded such digital signal processors. A stable operation demonstrated power supply (Vdd) of 1.8 V. technology, the minimum transistor (0.27 mu/m/spl times/0.15 mu/m) with gate pitch 0.54 metal 0.65 mu/m.
The integration of RF NLDMOS transistors into a 0.13 μm CMOS process for operating at X-Band (8.5-10.5 GHz) frequencies with over 11 dB gain and 0.25 W/mm power density 22% added efficiency 1 output compression is presented. self aligned was modularly integrated IHP's 130 nm SiGeC BiCMOS platform targeting W amplifiers radar satellite communication applications.
Mixed signal on chip solutions for space applications and high energy physics experiments require voltage RF-LDMOS transistors with a sufficient ruggedness against ionizing radiation single event burn out effects. We report the effectiveness of novel hardening by design approach tolerant integrated RF power MOSFET confirmed (SEB) total dose (TID) tests. In order to substantially decrease TID related leakage currents lateral shallow trench isolation (STI) was replaced narrow junction regions....
An ASIC for full digital control of electronic ballasts fluorescent lamps is presented. The one-chip solution the functional integration 3 chips, an IC PFC, a lamp management and half bridge driver IC. has V compatible high precision ADC comparator inputs, fully controlled regulation power state machine establishing management. outputs are 13 speed FET drivers that directly by logic. paper presents topology ballast, interfaces to two main loops, analog blocks. fabricated in 0.35 /spl mu/m...
Isolated LDMOS transistors with thin gate oxides and good RF performance are key components in integrated circuits where large voltage shifts required for the circuit functionality. We demonstrate modular integration of isolated NLDMOS PLDMOS focusing on maximal into an advanced industrial 0.25 μm SiGe:C BICMOS process. A boundary condition device construction was a limit maximum deep n-well implantation energy 750keV. The achieved values BV <sub...