Yifan He

ORCID: 0009-0001-8664-037X
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About
Contact & Profiles
Research Areas
  • Advanced Memory and Neural Computing
  • Ferroelectric and Negative Capacitance Devices
  • CCD and CMOS Imaging Sensors
  • Power Systems and Renewable Energy
  • Semiconductor materials and devices
  • Parallel Computing and Optimization Techniques
  • High-Voltage Power Transmission Systems
  • Low-power high-performance VLSI design
  • Advanced Neural Network Applications
  • Power Systems and Technologies
  • Smart Grid and Power Systems
  • Power System Optimization and Stability
  • Advanced Data Storage Technologies
  • Analog and Mixed-Signal Circuit Design
  • Microgrid Control and Optimization
  • Optimal Power Flow Distribution
  • Image Processing Techniques and Applications
  • Infrastructure Maintenance and Monitoring
  • Icing and De-icing Technologies
  • Advanced Fluorescence Microscopy Techniques
  • Sugarcane Cultivation and Processing
  • Electrowetting and Microfluidic Technologies
  • Optical Coherence Tomography Applications
  • Hallucinations in medical conditions
  • IoT and GPS-based Vehicle Safety Systems

Tsinghua University
2020-2025

China University of Mining and Technology
2024

Shenzhen Polytechnic
2024

Chinese Academy of Sciences
2023

Institute of Microelectronics
2023

Zhejiang Energy Research Institute
2023

Electric Power Research Institute
2020

Chongqing University of Technology
2020

Eindhoven University of Technology
2011-2018

Beijing Institute of Technology
2017

Computing-in-memory (CIM) is an attractive approach for energy-efficient neural network (NN) processors, especially low-power edge devices. Previous CIM chips have demonstrated macro and system-level design enabling multi-bit operations sparsity support. However, several challenges exist, as shown in Fig. 15.2.1. First, though a previously proposed block-wise strategy can power off ADCs, zeros still contributed to storage requirements, gating was not applied computing resources. Second,...

10.1109/isscc42613.2021.9365958 article EN 2022 IEEE International Solid- State Circuits Conference (ISSCC) 2021-02-13

Computing-in-Memory (CIM) is a promising solution for energy-efficient neural network (NN) processors. Previous CIM chips [1], [4] mainly focus on the memory macro itself, lacking insight overall system integration. Recently, CIM-based processor [5] speech recognition demonstrated energy efficiency. No prior work systematically explores sparsity optimization processor. Directly mapping sparse NN models onto regular macros ineffective, since data usually randomly distributed and cannot be...

10.1109/isscc19947.2020.9062958 article EN 2022 IEEE International Solid- State Circuits Conference (ISSCC) 2020-02-01

Automatic detection of traffic signs is crucial for Advanced Driving Assistance Systems (ADAS). Current two-stage approaches consist a preliminary object step, where the are categorized within broader families (e.g., speed limits), and then sub-classes limit 40). However, these cascading methods fail to achieve satisfying performance, especially in more realistic driving scenarios images acquired under challenging conditions. Under such conditions, first-stage step likely provide inaccurate...

10.1109/tits.2024.3373793 article EN IEEE Transactions on Intelligent Transportation Systems 2024-03-18

Computing-in-memory (CIM) is a promising architecture for energy-efficient neural network (NN) processors. Several CIM macros have demonstrated high energy efficiency, while CIM-based system-on-a-chip not well explored. This work presents NN processor, named STICKER-IM, which implemented with sophisticated system integration. Three key innovations are proposed. First, CIM-friendly block-wise sparsity (BWS) designed, enabling both activation-sparsity-aware acceleration and...

10.1109/jssc.2022.3148273 article EN IEEE Journal of Solid-State Circuits 2022-02-16

In the field of transformer failure diagnosis, potential correlation between different characteristic parameters and failures is difficult to detect using traditional methods. Further, quantities inspection data have not been fully utilized. To improve accuracy this study establishes a diagnosis model based on fuzzy association rules combined with case-based reasoning (CBR) evaluate types, fault locations, cause breakdown in power transformers. First, transformers are collected from several...

10.1049/iet-gtd.2019.1423 article EN IET Generation Transmission & Distribution 2020-02-19

This paper presents a 2-to-8-b scalable digital SRAM-based CIM macro that is co-designed with multiply-less neural-network (NN) design methodology and incorporates dynamic-logic-based approximate circuits for vector-vector operations. Digital CIMs enable high throughput reliable matrix-vector multiplications (MVMs); however, face three major challenges to obtain further aggressive gains over conventional architectures: (1) prior exploiting computation suffer from accuracy degradation [1];...

10.1109/isscc42615.2023.10067305 article EN 2022 IEEE International Solid- State Circuits Conference (ISSCC) 2023-02-19

As the new era of Internet Things(IoT) is driving evolution conventional Vehicle Ad-hoc Networks into Vehicles(IoV), vehicles are equipped with different kinds sensor and become a sensing node themselves in IoV. Consequently, complexity automotive electronic system inside daily increasing. To guarantee safe operation vehicles, it great significance to acquire vehicle data real-time realize on-line diagnosis, cybersecurity attacking detection et al. In this paper, we propose STM32-based...

10.1109/icis.2017.7960119 article EN 2017-05-01

RRAM is a promising candidate to implement large-capacity in-memory computing on edge AI devices due its high density. However, the efficiency and accuracy of RRAM-based computing-in-memory (CIM) works are limited by large accumulation currents device variations. The SRAM-based digital CIM achieves superior performance while adder tree dominates area. In this brief, macro proposed achieve better trade-off between accuracy, energy, three techniques. First, dynamic voltage sense amplifier...

10.1109/tcsii.2022.3209872 article EN IEEE Transactions on Circuits & Systems II Express Briefs 2022-09-27

Digital computing-in-memory (DCIM) has showcased its superiority in terms of throughput and accuracy as it scales down toward advanced technology nodes [1] –[3]. However, the inherent computation scheme imposes a limitation on both density efficiency order conventional digital logic. More specifically, many DCIM macros behave more like compute cores rather than memory modules where logic dominates macro area. Previous approximate analog CIM designs [4] –[6] relieve problem storage at cost...

10.1109/isscc49657.2024.10454323 article EN 2022 IEEE International Solid- State Circuits Conference (ISSCC) 2024-02-18

Transformer-based deep learning networks are revolutionizing our society. The convolution and attention co-designed (CAC) Transformers have demonstrated superior performance compared to the conventional networks. However, CAC Transformer contain various nonlinear functions, such as softmax complex activation which require high precision hardware design yet typically with significant cost in area power consumption. To address these challenges, <italic...

10.1109/tcsvt.2024.3386779 article EN IEEE Transactions on Circuits and Systems for Video Technology 2024-04-09

Shore power system that powers berthing ships is gradually becoming widely used worldwide because it helps reduce air and noise pollution.However, due to the bad environment of port, influence port tide on temperature distribution ampacity shore cable connecting ship can't be ignored.Therefore, in this paper, a thermal field calculation model based electromagnetic-thermal-flow coupling presented, which impact has been considered.And validity verified by circuit method base IEC(International...

10.1109/access.2020.3005305 article EN cc-by IEEE Access 2020-01-01

Previous RRAM-based computing-in-memory works mainly focus on the current-domain approach. However, performance and accuracy of current computation are limited by large read currents RRAM cells their variations. This work presents a novel charge-domain design, C-RRAM, to resolve these limitations. A 3TlRlC cell is proposed execute MAC operations capacitor discharging. The resistance variations can be tolerated with reasonable discharging time, which accelerated positive feedback loop. Also,...

10.1109/iscas48785.2022.9937513 article EN 2022 IEEE International Symposium on Circuits and Systems (ISCAS) 2022-05-28

Deploying neural network (NN) models on Internet-of-Things (IoT) devices is important to enable artificial intelligence (AI) the edge realizing AI-of-Things (AIoT). However, high energy consumption and bandwidth requirement of NN restricts AI applications battery-limited equipments. Compute-In-Memory (CIM), featured with efficiency, provides new opportunities for IoT deployment NN. design CIM-based full system still at early stage, lacking system-level demonstration vertical optimization...

10.1109/tcsii.2023.3249245 article EN IEEE Transactions on Circuits & Systems II Express Briefs 2023-02-27

Three-dimensional (3-D) understanding or inference has received increasing attention, where 3-D convolutional neural networks (3D-CNNs) have demonstrated superior performance compared to 2D-CNNs, since 3D-CNNs learn features from all three dimensions. However, suffer intensive computation and data movement. In this article, Sagitta, an energy-efficient low-latency on-chip 3D-CNN accelerator, is proposed for edge devices. Locality small differential value dropout are leveraged increase the...

10.1109/jiot.2023.3306435 article EN IEEE Internet of Things Journal 2023-08-18

Computing-in-memory (CIM) chips have demonstrated promising high energy efficiency on multiply–accumulate (MAC) operations for artificial intelligence (AI) applications. Though integral (INT) CIM are emerging, the floating-point (FP) chip has not been well explored. The high-accuracy demand of larger models and complex tasks requires FP computation. Besides, most neural network (NN) training still rely This work presents an energy-efficient processor. It is observed that exponent values data...

10.1109/jssc.2024.3363871 article EN IEEE Journal of Solid-State Circuits 2024-08-01

Single-Instruction-Multiple-Data (SIMD) architectures, which exploit data-level parallelism (DLP), are widely used to achieve high-performance and low-power computing. In most of streaming applications, such as CNN-based detection recognition, color space conversion various kinds filters, multiply-accumulate is one the important expensive operations be executed. this paper, we propose a SIMD architecture with advanced multiply accumulator (MAC) support (MacSim) improve computational...

10.1109/dsd.2016.27 article EN 2016-08-01

An energy-efficient convolutional neural network (CNN) accelerator is proposed for low-power inference on edge devices. adaptive zero skipping technique to dynamically skip the zeros in either activations or weights, depending which has higher sparsity. The characteristic of non-zero data aggregation explored enhance effectiveness performance boosting. To mitigate load imbalance issue after skipping, a sparsity-driven flow and low-complexity dynamic task allocation are employed different...

10.1109/tcsvt.2023.3274964 article EN IEEE Transactions on Circuits and Systems for Video Technology 2023-05-10

Computing-in-memory (CIM) is a new architecture which more energy-efficient than the Von Neumann due to fact that it performs calculation in memory units can reduce large amount of data movement. Nowadays, CIM with non-volatile (nvCIM), such as resistive random access (RRAM), has become research frontier further improve computing performance. Recent works mainly explored how performance nvCIM, but seldom paid attention problem accuracy loss. In this paper, we propose nvCIM framework,...

10.1109/tcsi.2021.3124553 article EN IEEE Transactions on Circuits and Systems I Regular Papers 2021-11-30

Non-volatile computing-in-memory (nvCIM) has become one of the most efficient methods to deal with increasingly complicated neural networks compared traditional von Neumann architecture. However, due immature fabrication issues, yield resistive random access memory (RRAM) cells is limited, which causes Stuck-At-Faults (SAFs) and decrease network classification accuracy. In this brief, bit-aware fault-tolerant hybrid retraining remapping schemes are proposed restore accuracy caused by SAFs....

10.1109/tcsii.2022.3163177 article EN IEEE Transactions on Circuits & Systems II Express Briefs 2022-03-29

In the process of electric energy substitution, many industries have gradually replaced traditional consumption equipment with new electrical ones. To avoid disadvantage one-sidedness in evaluation and provide a more comprehensive reference for enterprises to replace equipment, two-dimensional model composed static dynamic rating is proposed this paper based on combined weighting algorithm, considering performance both inherent properties actual power features equipment. The parameters...

10.1016/j.egyr.2021.01.048 article EN cc-by-nc-nd Energy Reports 2021-04-01

The frame rate of commercial off-the-shelf industrial cameras is breaking the threshold 1000 frames-per-second, sample required in high performance motion control systems. On one hand, it enables computer vision as a cost-effective feedback source; other imposes multiple challenges on processing system. authors have designed and implemented an FPGA-based embedded system support visual servoing applications. will be demonstrated together with mechanical for based inkjet printing. This...

10.1109/icdsc.2011.6042946 article EN 2011-08-01
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