Zhihua Wang

ORCID: 0000-0001-6567-0759
Publications
Citations
Views
---
Saved
---
About
Contact & Profiles
Research Areas
  • Radio Frequency Integrated Circuit Design
  • Advancements in PLL and VCO Technologies
  • Analog and Mixed-Signal Circuit Design
  • CCD and CMOS Imaging Sensors
  • Microwave Engineering and Waveguides
  • Advancements in Semiconductor Devices and Circuit Design
  • Photonic and Optical Devices
  • Energy Harvesting in Wireless Networks
  • Wireless Power Transfer Systems
  • Semiconductor Lasers and Optical Devices
  • Wireless Body Area Networks
  • Advanced Power Amplifier Design
  • Low-power high-performance VLSI design
  • Neuroscience and Neural Engineering
  • Sensor Technology and Measurement Systems
  • Advanced Data Compression Techniques
  • Semiconductor materials and devices
  • Electromagnetic Compatibility and Noise Suppression
  • Gastrointestinal Bleeding Diagnosis and Treatment
  • Ultra-Wideband Communications Technology
  • Full-Duplex Wireless Communications
  • VLSI and Analog Circuit Testing
  • RFID technology advancements
  • Advanced Memory and Neural Computing
  • EEG and Brain-Computer Interfaces

Tsinghua University
2016-2025

Nanjing University of Science and Technology
2024-2025

Sichuan University
2024-2025

Nanchong Central Hospital
2022-2025

Shenzhen MSU-BIT University
2023-2025

City University of Hong Kong
2020-2025

Capital Medical University
2025

Institute of Microelectronics
2015-2024

Nankai University
2024

Shanghai Ocean University
2024

Underwater object detection plays a significant role in marine ecosystem research and species conservation. The improvement of related technologies holds practical significance. Although existing object-detection algorithms have achieved an excellent performance on land, they are not satisfactory underwater scenarios due to two limitations: the objects often small, densely distributed, prone occlusion characteristics, embedded devices limited storage computational capabilities. In this...

10.3390/app14031095 article EN cc-by Applied Sciences 2024-01-27

An energy-efficient application-specific integrated circuit (ASIC) featured with a work-on-demand protocol is designed for wireless body sensor networks (WBSNs) in medical applications. Dedicated ultra-low-power nodes, the ASIC consists of low-power microcontroller unit (MCU), power-management (PMU), reconfigurable interfaces, communication ports controlling transceiver, and an passive radio-frequency (RF) receiver energy harvesting ability. The MCU, together PMU, provides quite flexible...

10.1109/tbcas.2009.2031627 article EN IEEE Transactions on Biomedical Circuits and Systems 2009-11-06

This paper presents the design of a wireless capsule endoscope system. The proposed system is mainly composed CMOS image sensor, RF transceiver and low-power controlling processing application specific integrated circuit (ASIC). Several challenges involving power reduction, miniaturization wake-up method are resolved by employing optimized architecture, integration an area efficient compression module, management unit (PMU) novel subsystem with zero standby current in ASIC design. has been...

10.1109/tbcas.2008.2006493 article EN IEEE Transactions on Biomedical Circuits and Systems 2009-01-16

This paper presents a wireless power transfer system for motion-free capsule endoscopy inspection. Conventionally, transmitter in specifically designed jacket has to be connected strong source with long cable. To avoid the cable and allow patients walk freely room, this proposes two-hop system. First, is transferred from floor relay patient's via coupling. Next, delivered loose Besides making much more conformable, proposed techniques eliminate sources of reliability issues arisen moving...

10.1109/tbme.2012.2206809 article EN IEEE Transactions on Biomedical Engineering 2012-06-29

A fully-integrated 77 GHz frequency doubling two-path phased-array frequency-modulated continuous-wave (FMCW) transceiver for automotive radar applications is proposed. By utilizing the scheme, chirp bandwidth improved, and complexity of synthesizer insertion loss local-oscillating (LO) distribution network are both reduced. Top-injected coupled resonator based wide locking range technique proposed in doublers to minimize required injection power cover plus enough PVT variation margin,...

10.1109/jssc.2016.2580599 article EN IEEE Journal of Solid-State Circuits 2016-07-11

This paper presents a CMOS broadband millimeter wave power amplifier (PA) based on magnetically coupled resonator (MCR) matching network. The MCR network is analyzed theoretically. Design method for MCR-based PA proposed. For the PA's output network, inductance ratio should be equal to load/source resistance achieve impedance transformation. And coupling coefficient (k) of can determined from no gain ripple condition. Fabricated in 65-nm process, chip achieves 32.9% peak added efficiency,...

10.1109/tcsi.2018.2799983 article EN IEEE Transactions on Circuits and Systems I Regular Papers 2018-04-10

This paper presents a hybrid brain-computer interface (BCI) that combines motor imagery (MI) and P300 potential for the asynchronous operation of brain-controlled wheelchair whose design is based on Mecanum wheel. paradigm completely user-centric. By sequentially performing MI tasks or paying attention to flashing, user can use eleven functions control wheelchair: move forward/backward, left/right, left45/right45, accelerate/decelerate, turn stop. The practicality effectiveness proposed...

10.1109/tnsre.2017.2766365 article EN IEEE Transactions on Neural Systems and Rehabilitation Engineering 2017-11-02

This paper proposed the design of a low-noise, low total harmonic distortion (THD) chopper amplifier for neural signal acquisition. A dc servo loop (DSL) based on active Gm-C integrator is to reject electrode-dc-offset (EDO). Architecture complementary input very low-transconductance (VLT) operational transconductance (OTA) was and integrated in improve linearity as well reduce noise, featuring ranging from 45 pS few nS. The fabricated TSMC 0.18-μm CMOS process, occupying an area 0.2 mm <sup...

10.1109/jssc.2019.2913101 article EN IEEE Journal of Solid-State Circuits 2019-06-25

This paper proposed a wearable smart sEMG recorder integrated gradient boosting decision tree (GBDT) based hand gesture recognition. A hydrogel-silica gel flexible surface electrode band is used as the tissue interface. The signal collected using neural acquisition analog front end (AFE) chip. quantitative analysis method to balance algorithm complexity and recognition accuracy. parallel GBDT implementation featuring low latency. processing unit (NSPU) implemented on an FPGA near AFE. RF...

10.1109/tbcas.2019.2953998 article EN cc-by IEEE Transactions on Biomedical Circuits and Systems 2019-11-25

This paper proposes a vision chip hybrid architecture with dynamically reconfigurable processing element (PE) array processor and self-organizing map (SOM) neural network. It integrates high speed CMOS image sensor, three von Neumann-type processors, non-von bio-inspired SOM The processors consist of pixel-parallel PE <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">$O(N\times N)$</tex></formula>...

10.1109/jssc.2014.2332134 article EN IEEE Journal of Solid-State Circuits 2014-07-11

Brain-computer interfaces (BCIs) not only can allow individuals to voluntarily control external devices, helping restore lost motor functions of the disabled, but also be used by healthy users for entertainment and gaming applications. In this study, we proposed a hybrid BCI paradigm explore feasible natural way play games using electroencephalogram (EEG) signals in practical environment. paradigm, combined imagery (MI) steady-state visually evoked potentials (SSVEPs) generate multiple...

10.1080/10447318.2018.1445068 article EN International Journal of Human-Computer Interaction 2018-03-09

With the development of on-chip learning processors for edge-AI applications, energy efficiency NN inference and training is more critical. As dominates consumption [1], [2], [4], [5], reduction paramount importance. Spiking neural networks (SNNs) offer energy-efficient compared with convolutional (CNNs) or deepneural (DNNs), but SNN-based have three challenges that need to be addressed (Fig. 22.6.1). 1) During training, some factors involved in ΔW computation are zeros resulting ΔW=O,...

10.1109/isscc42615.2023.10067650 article EN 2022 IEEE International Solid- State Circuits Conference (ISSCC) 2023-02-19

This paper describes a link margin enhancement method for high data rate impulse-radio ultra-wideband (IR-UWB) transceiver systems. To overcome trade-off between and spectrum compliance in the pulse based UWB system, spectrum-efficient frequency hopping (FH) technique is proposed to increase average transmission power without violating mask. An energy detection receiver used convert signal baseband with original bandwidth, thus improving signal-to-noise ratio. A 500 Mb/s 7.25-9.5 GHz...

10.1109/jssc.2015.2393815 article EN IEEE Journal of Solid-State Circuits 2015-02-05

This paper presents a novel maximum efficiency point (MEP) tracking method for wireless power transfer (WPT) systems. It is proved that at the MEP typical system containing boost converter on receiving end, derivative dD/dV <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">in</sub> (V being inverter's dc input and D duty cycle of converter) equal to or smaller than constant β determined by parameters. By tuning V comparing with β, can be tracked...

10.1109/tpel.2017.2726085 article EN IEEE Transactions on Power Electronics 2017-07-12

This letter proposes an efficient two-step segmentation method for large-scale 3-D point cloud data collected by the mobile laser scanners. First, a new scan-line-based ground algorithm is designed to filter points corresponding with high accuracy. Second, we propose selfadaptive Euclidean clustering further separate off-ground different objects. Experiments show that our delivers superior results on scanned data. In fact, proposed can be used in complex scenes including slope and bumpy road...

10.1109/lgrs.2014.2316009 article EN IEEE Geoscience and Remote Sensing Letters 2014-04-24

This paper presents a 14-bit 250 MS/s ADC fabricated in 180 nm CMOS process, which aims at optimizing its linearity, operating speed, and power efficiency. The implemented employs an improved SHA with parasitic optimized bootstrapped switches to achieve high sampling linearity over wide input frequency range. It also explores dedicated foreground calibration correct the capacitor mismatches gain error of residue amplifier, where novel configuration scheme little cost for analog front-end is...

10.1109/tcsi.2016.2580703 article EN IEEE Transactions on Circuits and Systems I Regular Papers 2016-08-11

A <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$D$ </tex-math></inline-formula> -band joint radar-communication complementary metal–oxide–semiconductor (CMOS) transceiver featuring a dual-function mode multiplexer, power-combining PA with high output power, current choking high-gain mixer, two-point modulation (TPM) frequency-modulated continuous-wave (FMCW) digital phase-locked loop (PLL) dual-core DCO,...

10.1109/jssc.2022.3185160 article EN IEEE Journal of Solid-State Circuits 2022-06-28

The classification of unmanned aerial vehicle hyperspectral images is great significance in agricultural monitoring. This paper studied a fine method for crops based on feature transform combined with random forest (RF). Aiming at the problem large number spectra and amount calculation, three methods dimensionality reduction, minimum noise fraction (MNF), independent component analysis (ICA), principal (PCA), were studied. Then, RF was used to finely classify variety images. results showed:...

10.3390/ijgi11040252 article EN cc-by ISPRS International Journal of Geo-Information 2022-04-12

Reducing learning energy consumption is critical to edge-artificial intelligence (AI) processors with on-chip since dominates consumption, especially for applications that require long-term learning. To achieve this goal, we optimize a neuromorphic algorithm and propose random target window (TW) selection, hierarchical update skip (HUS), asynchronous time step acceleration (ATSA) reduce the power consumption. Our approach results in 28-nm 1.25-mm <inline-formula...

10.1109/jssc.2024.3357045 article EN IEEE Journal of Solid-State Circuits 2024-08-01

A novel current-detection algorithm based on the time-domain approach for three-phase shunt active power filters (APFs) to eliminate harmonics, and/or correct factor, balance asymmetrical loads is analyzed in this paper. basic overview and evaluation of performance existing algorithms are presented. According different complicated quality issues various compensation purposes, a then proposed. Comparing with algorithms, has shorter response time delay clearer physical meaning. Different...

10.1109/tpwrs.2005.846215 article EN IEEE Transactions on Power Systems 2005-05-01

This paper presents a low-power transceiver with reconfigurable sliding-IF (intermediate frequency) architecture targeted for wireless body area networks hubs covering 400 MHz and 2.4 GHz bands. By using this architecture, 1608-1988 PLL synthesizer only 21% tuning range can fully cover all the available bands around as defined by IEEE 802.15.6 NB (narrow band) ZigBee. The dual-band has been designed in 0.18 μm CMOS process. design consists of receiver wideband front-end amplifier-mixer,...

10.1109/jssc.2013.2274893 article EN IEEE Journal of Solid-State Circuits 2013-08-15
Coming Soon ...