A5103150241- GaN-based semiconductor devices and materials
- Semiconductor materials and devices
- Ga2O3 and related materials
- Advancements in Semiconductor Devices and Circuit Design
- Semiconductor Quantum Structures and Devices
- Metal and Thin Film Mechanics
- Analytical Chemistry and Sensors
- Radiation Effects in Electronics
- Gas Sensing Nanomaterials and Sensors
- Acoustic Wave Resonator Technologies
- Power Transformer Diagnostics and Insulation
- Integrated Circuits and Semiconductor Failure Analysis
- Electron and X-Ray Spectroscopy Techniques
- VLSI and Analog Circuit Testing
- Silicon Carbide Semiconductor Technologies
- Low-power high-performance VLSI design
- Force Microscopy Techniques and Applications
- Radio Frequency Integrated Circuit Design
- High voltage insulation and dielectric phenomena
- Electrical Fault Detection and Protection
- Diamond and Carbon-based Materials Research
- ZnO doping and properties
- Semiconductor materials and interfaces
Hunan University
2023-2024
Peking University
2015-2020
Institute of Microelectronics
2015-2020
University of Hyogo
2003
University of Illinois Urbana-Champaign
1996
In this letter, we report a quasi-vertical GaN Schottky barrier diode (SBD) fabricated on hetero-epitaxial layer silicon with low dislocation density and high carrier mobility. The reduction of is realized by inserting thin Ga vacancies to promote the bending. 1.6 × 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">8</sup> cm xmlns:xlink="http://www.w3.org/1999/xlink">-2</sup> drift thickness 4.5 μm. prototype SBD delivers on/off current ratio...
In this letter, a plasma-free etch stop structure is developed for GaN HEMT toward enhancement-mode operation. The self-terminated precision gate recess realized by inserting thin AlN/GaN bilayer in the AlGaN barrier layer. stopped automatically at insertion layer after high-temperature oxidation and wet etch, leaving to maintain quantum well channel that normally pinched off. With addition of an Al <sub xmlns:mml="http://www.w3.org/1998/Math/MathML"...
In this paper, we report the device performance of a high-voltage enhancement-mode (E-mode) GaN MOSHEMT on silicon substrate. Normally off operation is realized by self-terminated precision gate recess process an optimized high-electron mobility transistor structure. The fully pinched at zero bias, suggesting "true" normally operation. threshold voltage 0.4 V with drain current density 1 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML"...
AlGaN/GaN high-electron-mobility transistor (HEMT) based pH sensors have the advantages of fast response and high stability, can be used in harsh environments. This paper presents a sensor on planar dual-gate HEMT cascode amplifier, which increase sensitivity for about 45 times from mV/pH to 2.06 V/pH with linearity 1.27%. The results indicate that it is possible improve at origin detecting instead subsequent complex amplifier circuits. proposed device has also shown capacity adjust sensor's...
Threshold voltage drift under gate bias stress was investigated in gate-recessed enhancement mode (E-mode) GaN MOSFET and depletion (D-mode) MOS high-electron-mobility transistor (MOSHEMT) with Al2O3 dielectric layer. Besides the positive shift of threshold both devices stress, it is also found that could exist E-mode negative while observed D-mode MOSHEMT. A three-step trapping detrapping process drain current transient device after stress. It suggested electron injection following...
We report the properties of silicon nitride films deposited by electron cyclotron resonance remote plasma enhanced chemical vapor deposition method on Si substrates using SiH4 and N2. The effects nitrogen/silane gas ratio (R=N2/SiH4), power, substrate temperature, H growth, refractive index, composition, etch rate were investigated. Nominally stoichiometric Si3N4 obtained with a index 1.9∼2.0 at wavelength 632.8 nm. in buffered HF solution (7:1) was low (∼0.7 nm/min) increased increasing H2...
In this letter, a gate recessed normally-off GaN metal-oxide-semiconductor high-electron-mobility-transistor on silicon substrate is fabricated using AlN/Si <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> N xmlns:xlink="http://www.w3.org/1999/xlink">4</sub> as the passivation layer. The thin AlN layer serves dual role of protecting channel region from direct plasma bombardment during RIE Si removal and passivating surface states in...
Abstract The time-dependent threshold voltage drift induced by fast interface traps in a fully gate-recessed normally-off GaN MOSFET is studied. It found that the degree and time scale of shift are consistent with density constant at MOS interface. device based on wet etching delivers higher quality stability than dry etching. Nitrogen deficiency high oxygen coverage considered to be origins trap fabricated
In order to suppress the crosstalk in gallium nitride (GaN)-based bridge configuration, this article proposes a novel high-frequency three-level gate driver (HFTGD), and suppression with switching frequency up 5 MHz can be achieved. The capacitor–diode circuit generates negative voltage prevent false turn- <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">on</small> of device under impact positive crosstalk. Pulsewidth modulation generator works...
Time-dependent OFF-state leakage behavior of AlGaN/GaN MISHEMTs on silicon substrate is investigated and a novel degradation mechanism proposed in this paper. Under constant high voltage stress, drain current gradually increases with stress time the gate bias temperature-dependent. Consecutive breakdown measurement injection technique indicates that negative shift threshold ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math...
This work reports a kilovolt and low current collapse normally-off GaN MOSHEMT on silicon substrate. The device with drift length of 3 μm features threshold voltage 1.7 V an output 430 mA/mm at 8 gate bias. off-state breakdown (BV) is as high 1021 (800 V) defined drain leakage criterion 10 μA/mm floating (grounded) corresponding electric field 3.4 MV/cm the Baliga's figure-of-merit (BFOM) 1.6 GW/cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML"...
This paper discusses the stuck bits induced by gate breakdown of PMOS in sub-20 nm FinFET static random access memory (SRAM) device. After heavy-ion experiment, several are SRAM matrix, which cannot be set or reset. To investigate factors that caused bit, we perform electrical failure analysis (EFA) to measure electric characteristics transistors and normal cells separately. The measurement results show a clear at pull-up (PPU) transistor all measured cells. Meanwhile, SPICE simulation based...
The single event transient (SET) susceptibility in the sub-20nm bulk FinFET process is studied this letter. It firstly found that NMOS more sensitive to SET compared with PMOS, which opposite planar CMOS process. A Technology Computer-Aid Design (TCAD) model established research underlying physical mechanisms. Results show two factors lead difference between and PMOS. First, drift & diffusion (DD) plays role than bipolar amplification (BA) FinFET-PMOS, causing lower sensitivity planar-PMOS....
In this letter, based on a new growth strategy, we demonstrate high-performance quasi-vertical GaN Schottky barrier diode (SBD) fabricated the hetero-epitaxial layer silicon, with highest current on/off ratio of 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">10</sup> , lowest specific on-resistance 0.95 mΩ·cm xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> and ideality factor 1.23 among SBD reported until now. It reveals great potential...