Lukáš Fujčík

ORCID: 0000-0002-2085-5984
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Research Areas
  • Analog and Mixed-Signal Circuit Design
  • Sensor Technology and Measurement Systems
  • Analytical Chemistry and Sensors
  • Advancements in Semiconductor Devices and Circuit Design
  • Advanced MEMS and NEMS Technologies
  • Neuroscience and Neural Engineering
  • CCD and CMOS Imaging Sensors
  • Advancements in PLL and VCO Technologies
  • Numerical Methods and Algorithms
  • Digital Filter Design and Implementation
  • Advanced Memory and Neural Computing
  • Electrochemical Analysis and Applications
  • Electrochemical sensors and biosensors
  • Semiconductor materials and devices
  • Neural Networks and Applications
  • Advanced Electrical Measurement Techniques
  • Embedded Systems Design Techniques
  • Advanced Chemical Sensor Technologies
  • Advanced DC-DC Converters
  • Radio Frequency Integrated Circuit Design
  • Advanced Semiconductor Detectors and Materials
  • Infrared Target Detection Methodologies
  • Advanced Sensor and Energy Harvesting Materials
  • Transition Metal Oxide Nanomaterials
  • Antenna Design and Optimization

Brno University of Technology
2011-2024

Center for Economic Research and Graduate Education – Economics Institute
2006

In this paper, a new reconfigurable polymorphic chip (REPOMO32) is introduced. This has been developed in order to investigate the electrical properties of circuits and demonstrate applications electronics. REPOMO32 contains an array 32 configurable logic elements; each them can perform AND, OR, XOR NAND/NOR function which controlled by level power supply voltage. parameters are reported together with analysis implemented evolved REPOMO32. Potential also discussed.

10.1109/weah.2009.4925666 article EN 2009-03-01

Purpose The purpose of this paper is to design and create a potentiostat that can be integrated encapsulated within microelectrode as low‐cost electrochemical sensor. Recently, microsystems on sensors or lab chip using detection substances matters are pushing forward into the area analysis. For providing analysis, microsystem has equipped with an potentiostat. Design/methodology/approach four current ranges (from 1 μ A mA) was designed in CADENCE software environment AMIS CMOS 0.7 m...

10.1108/13565361011009450 article EN Microelectronics International 2010-01-15

This paper presents ultra-low voltage transconductor using a new bulk-driven quasi-floating-gate technique (BD-QFG). leads to significant increase in the transconductance and bandwidth values of MOS transistor (MOST) under condition. The proposed CMOS structure is capable work with supply ±300 mV low power consumption 18 μW. value tunable by external resistor wide linear range. To prove validation described second-order G m -C multifunction filter presented as one possible applications....

10.1142/s0218126613500734 article EN Journal of Circuits Systems and Computers 2013-08-30

This paper presents a novel analog front-end for EMG sensor signal processing powered by 1 V. Such low supply voltage requires specific design steps enabled using the 28 nm fully depleted silicon on insulator (FDSOI) technology from STMicroelectronics. An active ground circuit is implemented to keep input common-mode close and minimize external interference. The amplifier comprises an instrumentation (INA) programmable-gain (PGA). Both are in differential topology. actual performance of...

10.3390/s23073422 article EN cc-by Sensors 2023-03-24

This paper presents electronically controllable concept of the CMOS voltage differencing current conveyor (VDCC) for precise operations with large dynamic range and robust automotive applications. It was designed fabricated in ON Semiconductor 0.7 um I2T100 technology. Because unique internal structure, not only value but also polarity transconductance stage VDCC can be controlled by external DC voltage. Moreover, adjusting resistance input terminal is possible bias current. contribution...

10.1109/mwscas.2016.7870105 article EN 2022 IEEE 65th International Midwest Symposium on Circuits and Systems (MWSCAS) 2016-10-01

Screen‐printed electrodes are widely used in the construction of sensors. The use graphite material is preferred due to its simple technological processing and low cost. Different pastes compared for hydrogen peroxide detection. slope calibration curve, linearity limit detection have been different technologies electrode preparation. influence structure paste on response discussed. Physical methods sensitivity enhancement proposed. All results with platinum as reference.

10.1108/13565360410549684 article EN Microelectronics International 2004-07-23

This paper focuses on a novel circuit suitable for implementation of feed-forward artificial neural networks. Structure the is derived from concept Field Programmable Neural Array - Network. The aim to describe an innovative promising approach fast hardware implementations networks and introduce some special techniques that was used in design this its optimization. proposed facilitates all common topologies covers wide spectrum applications optimized be implemented into new FPGAs Xilinx,...

10.1109/tsp.2013.6614033 article EN 2013-07-01

In this paper, a second-order asynchronous delta-sigma modulator (ADSM) is proposed based on the active-RCintegrators. The ADSM implemented in 0.18 μ m CMOS Logic or Mixed-Signal/RF, General Purpose process from Taiwan Semiconductor Manufacturing Company with center frequency of 848 kHz at supply voltage 1 V 92 dB peak signal-to-noise and distortion ratio ( S N D R ), which corresponds to 15 bit resolution. These parameters were achieved all endogenous bioelectric signals bandwidth 10 kHz....

10.3390/s20154137 article EN cc-by Sensors 2020-07-25

The paper presents an enhanced architecture of finite impulse response digital filters. proposed contains one multiply-accumulate unit and random access memory to store data. utilizes serial calculation achieve minimum requirements on area. is suitable for implementation in application specific integrated circuits field programmable gate arrays. main advantages the are higher operating frequency, lower power consumption smaller area utilization particular cases.

10.1016/j.ifacol.2015.07.052 article EN IFAC-PapersOnLine 2015-01-01

This paper describes a self-compensating system for fixed pattern noise reduction (FPNR) of focal plane arrays (FPA) infrared (IR) bolometer detectors. The proposed used ΔΣ modulator first order which operates as non-saturating current integrator. method also suppressed the self-heating effect well resistance non-uniformity across FPA. read-out circuit (ROIC) was designed in ONSemi I2T100 technology considering matching and effects fabricated using EUROPRACTICE service. Its verification made...

10.1016/j.proeng.2016.11.327 article EN Procedia Engineering 2016-01-01

This paper describes steps involved in a new VHDL design of decimation filter for sigma-delta (/spl sigma//spl Delta/) modulator. Parameters are derived from the specifications overall /spl Delta/ Using Matlab and MathCAD tool it is possible to find order, required quantization level coefficients their values. Finally, by analyzing design, we can an efficient way implement hardware. structure designed two versions using VHDL. The first version programmed tested on FPGA chip. Then second was...

10.1109/asense.2005.1564540 article EN 2006-01-05

This paper presents a system architecture for sensor signal digitization utilizing band-pass sigma-delta modulator (BP ΣΔM). The first version of the proposed was implemented in 5V 0.7µm CMOS technology. is useful our capacitive pressure measurement. describes possibilities using enhanced impedance spectroscopy and BP ΣΔM well suited wireless applications. shows another way how to use its advantages.

10.1587/transele.e92.c.860 article EN IEICE Transactions on Electronics 2009-01-01

This paper describes digital circuit which produce sigma-delta modulated sine waveform. The should be used for measurements, calibrations and reference purposes. waveform is generated using a novel algorithm results from simple method to generate signal in analogue circuits. designed as fully described VHDL language. structure of the was implemented tested an FPGA chip. Presently design being transferred into ASIC utilizing AMIS CMOS 07 technology. After fabrication testing, some changes...

10.1109/tsp.2011.6043679 article EN 2011-08-01

This paper presents a system architecture for sensor signal digitization utilizing bandpass sigma-delta modulator. The first version of the proposed was implemented in 5V 0.7μm CMOS technology. is useful our capacitive pressure measurement. describes possibilities using enhanced impedance spectroscopy and modulators are well suited wireless applications. shows another way how to use its advantages.

10.1109/icons.2009.38 article EN 2009-01-01

Abstract Nowadays, the technology advancements of signal processing, low-voltage low-power circuits and miniaturized have enabled design compact, battery-powered, high performance solutions for a wide range of, particularly, biomedical applications. Novel sensors human signals are creating new opportunities low weight wearable devices which allow continuous monitoring together with freedom movement users. This paper presents implementation novel sensor in integrated circuit (IC) form...

10.2478/jee-2019-0071 article EN Journal of Electrical Engineering 2019-09-01

The paper deals with a design of the 16-bit MASH Delta-sigma (ΔΣ) converter utilizing switched capacitor technique (SC). attention was paid to reach 16bit ENOB resolution even same precision STF in band. This requirement is crucial evaluation signal amplitude independently on its frequency. Multistage structure two second order CIDIDF modulator used. system consists continuous time amplifier, and decimation digital filter. ONSemi I3T25 350nm CMOS technology used for design. value SNDR =...

10.1109/tsp.2015.7296356 article EN 2015-07-01

A novel solution of the first-order asynchronous delta–sigma modulator (ADSM) is proposed. The circuit designed for commercial temperature range (0 °C to 70 °C) in a 28 nm fully depleted silicon on insulator (FD-SOI) technology from STMicroelectronics. This allows designing new subcircuit topologies, resulting an ADSM that offers 64.2 dB signal-to-noise and distortion ratio (SNDR) corresponding 10.37-bit resolution signal bandwidth 10 kHz. consumes 4.1 μW at power supply 1 V, obtained...

10.1016/j.jestch.2024.101821 article EN cc-by-nc-nd Engineering Science and Technology an International Journal 2024-09-01

The paper deals with bandpass sigma-delta modulator (BP SDM), which is used for conversion of signal from capacitive pressure sensor. This approach absolutely new and unique, because this kind modulators utilized only wireless video applications. main advantage BP SDM due to its defined band. That why it resistant against offsets subcuircits. Another important low power consumption, since the digitizes narrow band instead whole Nyquist similar dynamic range. shows basic ideas simulation...

10.1109/imtc.2007.379037 article EN Conference proceedings - IEEE Instrumentation/Measurement Technology Conference 2007-05-01

A novel active resistor circuit offering less sensitivity to process and temperature variations without any extra trimming is proposed. The consists of two accurately matched, high resistance polysilicon (hripoly) resistors a voltage-controlled MOS resistor, it designed for the industrial range (-20 °C 85 °C) in TSMC 180 nm general-purpose process. actual performance analyzed by using Corner Monte Carlo analyses that comprise thousand samples global local variations. maximum error value ±6.2...

10.1109/access.2020.3034790 article EN cc-by IEEE Access 2020-01-01

The paper deals with a design of the 12-bit sigma delta (ΣΔ) modulator using switched capacitor technique (SC). It is part system for vibration sensor output processing. Processing consists pre-amplifier, delta-sigma and decimation digital filter. Detailed description process ΣΔ described in article. starts by parameter requirements determination, continuing structure proposal, method coefficients selection, selecting compensation methods concluding on chip. ONSemi I2T100 700 nm CMOS...

10.1109/tsp.2013.6613960 article EN 2013-07-01

The paper presents an architecture of a module for computation Discrete Fourier Transform with Fast algorithm. is optimized low area implementation and suitable in application specific integrated circuits (ASIC). Software C++ was written automatic FFT generation various parameters. software generates fully synthesizable VHDL code SystemVerilog testbench verification.

10.1109/tsp.2015.7296365 article EN 2015-07-01
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