By employing an interface protection technique to overcome the degradation of etched GaN surface in high-temperature process, highly reliable LPCVD-SiN <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">x</sub> gate dielectric was successfully integrated with recessed-gate structure achieve high-performance enhancement-mode (V xmlns:xlink="http://www.w3.org/1999/xlink">th</sub> ~ +2.37 V @ I xmlns:xlink="http://www.w3.org/1999/xlink">d</sub> = 100...

GaN-based digital integrated circuits (ICs) are realized on a 6-inch GaN-on-Si power high-electron-mobility transistor (HEMT) platform by monolithic integration of enhancement/depletion-mode HEMTs using 0.5-μm gate technology. A direct-coupled FET logic inverter and 101-stage ring oscillator fabricated characterized. The exhibits large input voltage swing, wide noise margin, high temperature stability, while the features small propagation delay 0.1 ns/stage under supply 4 V. These ICs can...

An AlGaN/GaN double-channel Schottky barrier diode (DC-SBD) with dual-recess gated anode is demonstrated in this letter. The DC-SBD features two recess steps. deep one cuts through channels, and the metal contacts 2DEG directly from sidewall of recessed heterostructure. shallow terminates at upper channel layer located adjacent to contact. A MOS field plate placed on region pinchoff underlying so off-state leakage current can be suppressed. Since lower separated etched surface, field-effect...

An enhancement-mode GaN power switch with monolithically integrated gate driver is demonstrated on a 650-V GaN-on-Si device platform. The GaN-based features advanced designs such as bootstrapped gate-charging current source that enables high driving capability during the entire turn-on process and rail-to-rail output. transistor was characterized up to 300 V/15 A switching operations using double pulse tester, exhibits suppressed ringing fast speed. peak drain voltage slew rate d V/dt above...

Abstract Various 2D/3D heterostructures can be created by harnessing the advantages of both layered two-dimensional semiconductors and bulk materials. A semiconducting gate field-effect transistor (SG-FET) structure based on is proposed here. The SG-FET demonstrated an AlGaN/GaN high-electron mobility (HEMT) adopting single-layer MoS 2 as electrode. effectively turn off HEMT without sacrificing subthreshold swing breakdown voltage. Most importantly, deliver inherent over-voltage protection...

Using remote N2 plasma treatment to promote dielectric deposition on the dangling-bond free MoS2 is explored for first time. The induced damages are systematically studied by defect-sensitive acoustic-phonon Raman of single-layer MoS2, with samples undergoing O2 as a comparison. causes defects in mainly oxidizing along already defective sites (most likely flake edges), which results layer oxidation MoS2. In contrast, straining and mechanically distorting layers first. Owing relatively strong...

An MOS field plate-protected Schottky-drain (gated Schottky-drain) is successfully integrated on a double-channel AlGaN/GaN MOS-HEMT to provide reverse blocking capability. The leakage suppression plate deployed the etched upper GaN channel layer after barrier fully recess process, leading low OFF-state current of -20 nA/mm (at -100 V). drain metal adjacent plate, contacting MOS-channel and lower heterojunction from sidewall. A metal-2DEG Schottky contact with turn-ON voltage 0.5 V achieved....

The OFF-state drain leakage characteristics in 600-V p-GaN HEMTs with an ohmic gate contact are investigated under dynamic switching conditions instead of commonly used quasi-static measurement setup. It is found that fast current (dynamic I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">OFF</sub> ) substantially higher than the slow-ramping due to weaker trapping effect buffer layer. With sufficiently large positive ON-state bias, further...

Systematic characterizations of a cascode device with low-voltage enhance-mode (E-mode) p-GaN gate high-electron mobility transistor as the control and high-voltage (HV) depletion-mode (D-mode) silicon carbide junction field effect (JFET) voltage blocking are presented in this article. The demonstrated breakdown rating 1200 V static on-resistance (RON) 100 mΩ features small capacitances fast switching speed, avalanche capability, thermally stable threshold (VTH), no dynamic RON degradation....

A previously reported normally-off GaN double-channel (DC-) MOS-HEMT with a gate recess into the upper channel layer has achieved remarkably low R <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">on</sub> . In this letter, we found that structure itself does not guarantee without careful consideration of electrical coupling between two channels. strong channel-to-channel (C2C) channels is critical to reduce in DC-MOS-HEMT by exploiting both at...

A three-terminal normally-off GaN switching device with highly desired low-loss reverse conduction capability was demonstrated using a chip-area-efficient structure design. This features interdigitated MIS-HEMT and high-performance embedded anti-parallel Schottky barrier diode (SBD) along the gate width direction, transistor sections sharing common ohmic contacts access regions. The MIS-HEMT/SBD ratio of 2:1 exhibits threshold voltage (V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML"...

When the gated channel region of a GaN high-electron-mobility transistor (HEMT) is configured into multiple sub-channels in parallel and separated by embedded isolating patterns, effective resistance access regions could be reduced, consequently, knee voltage (V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">K</sub> ) lowered. In this work, each sub-channel defined as convergent funnel-like shape, with its width gradually shrunk from source...

With substantially limited holes generation, the E-mode n-channel LPCVD-SiNx/GaN MIS-FET delivers small NBTI (with V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">ds</sub> = 0 and a negative xmlns:xlink="http://www.w3.org/1999/xlink">gs</sub> -30 V) even without hole-barrier. In high reverse-bias (i.e. drain bias off-state with <; xmlns:xlink="http://www.w3.org/1999/xlink">th</sub> large ) stress, larger gate-bias is found to accelerate...

In this paper, systematic characterization and the corresponding suppression strategies of dynamic OFF-state leakage current (I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">OFF</sub> ) in Schottky-type p-GaN gate high-electron-mobility transistors (HEMTs) are presented based on fast pulsed I-V measurement consecutive switching measurement. It is found that high I under pulse mode without hole injection a result reduced voltage blocking...

Low-loss reverse-conducting normally-OFF double-channel AlGaN/GaN power transistor with the builtin Schottky barrier diode (SBD) has been systematically studied. This device features MOS-gate section and SBD-anode paralleled to an interdigital layout along gate width direction. A common access region that conducts current at both forward reverse ON-states is employed, which beneficial reduce conduction loss. With a MOS-HEMT/SBD finger of 4 μm/2 μm total ratio 2:1, exhibits threshold voltage...

In this article, an ultrathin-barrier (UTB) AlGaN/GaN diode featuring metal-insulator-semiconductor (MIS)-gated hybrid anode (MG-HAD) and in situ Si <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> N xmlns:xlink="http://www.w3.org/1999/xlink">4</sub> cap passivation is demonstrated. The intrinsic turn-on voltage (V xmlns:xlink="http://www.w3.org/1999/xlink">ON</sub> ) as low 0.31 V determined by the as-grown AlGaN-barrier thickness (4.9...

A reverse blocking AlGaN/GaN normally-Off MIS-HEMT featuring double-recessed gated Schottky drain was demonstrated on a double-channel HEMT platform. Two recess steps with robust depth tolerance are performed to form the MIS-gated drain. The shallow stops at upper GaN channel layer where section (i.e. MIS field plate) is formed suppress leakage current. deep cuts through lower 2DEG metal-2DEG contact low turn-on voltage along sidewall. Since separated from surface of recess, in maintains...

A 1200-V/100-mΩ GaN/SiC cascode device is demonstrated with small capacitances for fast switching speed, no dynamic ON-resistance (RON) degradation, and stable high-temperature threshold voltage (VTH). To identify its safe operation in the OFF-state a high drain bias, middle point (VM) between GaN SiC devices investigated under static modes. An adequately low VM achieved at both states. distribution process found that capacitance-dependent during turn-off transient turns to be...

The charge-modulated Schottky barrier lowering (SBL) effect is revealed and studied on an AlGaN/GaN lateral SBD with gated anode. fabricated features a metal-2DEG contact leakage suppression MIS field plate to provide both low turn-on voltage ( VT) reverse current IR). It that the SBDs higher carrier density in channel under (MIS-channel) exhibits lower VT, IR height φB, which extracted from forward I-V curves based thermionic emission model). φB of metal-GaN junction can be lowered by image...

Remote N2 plasma treatment is explored as a surface functionalization technique to deposit ultrathin high-k dielectric on single-layer MoS2. The used tunneling contact layer, which also serves an interfacial layer below the gate region for fabricating top-gate MoS2 metal–oxide–semiconductor field-effect transistors (MOSFETs). fabricated devices exhibited small hysteresis and mobility high 14 cm2·V−1·s−1. resistance was significantly reduced, resulted in increase of drain current from 20 56...

In this work, a novel MIS-gated hybrid anode diode (MG-HAD) based on ultra-thin-barrier (UTB) AlGaN/GaN heterostructure is demonstrated to exhibit superior reverse blocking characteristic. An ultra-low leakage of ~1.1 × 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">−7</sup> A/mm observed in room-temperature (RT) and the breakdown voltage (BV) dominated by buffer breakdown, verify excellent characteristic originated from ALD-Ah03 insulator...

In this work, systematic characterization of dynamic OFF-state leakage current ( $\boldsymbol{I}_{\mathbf{OFF}}$ ) in Schottky-type $\boldsymbol{p}$ -GaN gate high-electron-mobility transistors (HEMTs) is presented based on pulsed I-V measurement and consecutive switching measurement. The high under pulse mode without hole injection found to be a result the reduced voltage blocking capabilities (both lateral vertical) with weaker trapping effect buffer, induced by ON-state attributed further...

A 0.5-um-gate GaN double-channel high-electron-mobility transistor (DC-HEMT) with enhanced linearity was demonstrated. The device delivers an fT of 36.5 GHz and fMAX 66.5 GHz. deployed on a GaN-on-Si platform, featuring second 2DEG channel formed by inserting 1.5-nm AlN insertion layer (AlN-ISL) several nanometers underneath the conventional at AlGaN/GaN interface. lower upper channels could be turned sequentially increasing VGS. When DC-HEMT is biased large VGS to obtain high drive current,...