Zheyang Zheng

ORCID: 0000-0002-6455-9300
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About
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Research Areas
  • GaN-based semiconductor devices and materials
  • Semiconductor materials and devices
  • Silicon Carbide Semiconductor Technologies
  • Ga2O3 and related materials
  • Advancements in Semiconductor Devices and Circuit Design
  • ZnO doping and properties
  • Radio Frequency Integrated Circuit Design
  • Semiconductor Quantum Structures and Devices
  • Electrostatic Discharge in Electronics
  • Semiconductor materials and interfaces
  • Electronic and Structural Properties of Oxides
  • Advanced Memory and Neural Computing
  • Electromagnetic Compatibility and Noise Suppression
  • 2D Materials and Applications
  • Graphene research and applications
  • Quantum Dots Synthesis And Properties
  • Thin-Film Transistor Technologies
  • Optical Network Technologies
  • Advanced Power Amplifier Design
  • Advanced DC-DC Converters
  • Photonic and Optical Devices
  • Neural Networks and Applications
  • Advanced Photocatalysis Techniques
  • Acoustic Wave Resonator Technologies
  • Chalcogenide Semiconductor Thin Films

University of Science and Technology of China
2023-2025

Hong Kong University of Science and Technology
2017-2024

University of Hong Kong
2017-2024

HKUST Shenzhen Research Institute
2019-2023

Zhejiang University
2016-2022

Wenzhou University
2022

Peking University
2022

Samsung (South Korea)
2022

Renesas Electronics (Japan)
2022

Institute of Microelectronics
2022

Enhancement-mode (E-mode) buried p-channel GaN metal-oxide-semiconductor field-effect-transistors (p-GaN-MOSFET's) with threshold voltage (V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">TH</sub> ) of -1.7 V, maximum ON-state current (I xmlns:xlink="http://www.w3.org/1999/xlink">ON</sub> 6.1 mA/mm and I /I xmlns:xlink="http://www.w3.org/1999/xlink">OFF</sub> ratio 10 <sup xmlns:xlink="http://www.w3.org/1999/xlink">7</sup> are demonstrated on a...

10.1109/led.2019.2954035 article EN IEEE Electron Device Letters 2019-11-20

By deploying a surface reinforcement layer (SRL) at the interface between Schottky metal and p-GaN in gate stack, high-electron-mobility transistor (HEMT) with enhanced reliability is demonstrated. Prior to deposition, SRL formed by an oxygen-plasma treatment subsequent high-temperature annealing process (at 800 °C) that enables reconstruction. Such converts several nanometers of near into crystalline GaON layer, which exhibits stronger immunity hot electron bombardment. With nearly...

10.1109/led.2020.3037186 article EN IEEE Electron Device Letters 2020-11-10

Gallium nitride (GaN), a promising alternative semiconductor to Si, is widely used in photoelectronic and electronic technologies. However, the vulnerability of GaN surface critical restriction that hinders development GaN-based devices, especially terms device stability reliability. In this study, challenge overcome by converting into gallium oxynitride (GaON) epitaxial nanolayer through an situ two-step "oxidation-reconfiguration" process. The O plasma treatment overcomes chemical...

10.1002/adma.202208960 article EN Advanced Materials 2023-01-07

The planar nature of the GaN heterojunction devices provides extended dimensions for implementing monolithic power integrated circuits. This article presents a comprehensive review advancements in integration. Basic building blocks integration platform based on p-GaN gate HEMT technology are discussed, including high- and low-voltage transistors, lateral field-effect rectifiers, resistors, capacitors. Exemplary designs driving circuit detection/protection circuits this demonstrated....

10.1109/ted.2023.3341053 article EN IEEE Transactions on Electron Devices 2023-12-27

An AlGaN/GaN double-channel Schottky barrier diode (DC-SBD) with dual-recess gated anode is demonstrated in this letter. The DC-SBD features two recess steps. deep one cuts through channels, and the metal contacts 2DEG directly from sidewall of recessed heterostructure. shallow terminates at upper channel layer located adjacent to contact. A MOS field plate placed on region pinchoff underlying so off-state leakage current can be suppressed. Since lower separated etched surface, field-effect...

10.1109/led.2017.2783908 article EN IEEE Electron Device Letters 2017-12-15

In this work, the deep-level transient spectroscopy (DLTS) is conducted to investigate gate stack of p-GaN HEMT with Schottky contact. A metal/p-GaN/AlGaN/GaN heterojunction capacitor prepared for study. The DLTS characterization captures capacitance change in stack, from which metal/p-GaN junction can be extracted. By proper selection rate window, impacts hole insufficiency effect are avoided during trap states evaluation. Thus, information deep energy levels layer revealed, consists an...

10.1109/led.2020.2980150 article EN IEEE Electron Device Letters 2020-03-11

In this work, we demonstrate a GaN-based <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\textit {p-n}$ </tex-math></inline-formula> junction gate (PNJ) HEMT featuring an notation="LaTeX">${n}$ -GaN/ notation="LaTeX">${p}$ -GaN/AlGaN/GaN stack. Compared to the more conventional -GaN with Schottky between metal and layer, can withstand higher reverse bias at same peak electric-field as depletion region...

10.1109/led.2020.2977143 article EN IEEE Electron Device Letters 2020-02-28

In this article, we systematically investigate the OFF-state drain-voltage-stress-induced threshold voltage ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$V_{\mathrm {TH}}$ </tex-math></inline-formula> ) instability in Schottky-type p-GaN gate high electron mobility transistors (HEMTs). drain-voltage stress and recovery tests were conducted under various temperatures different drain biases. A sharp...

10.1109/jestpe.2020.3010408 article EN IEEE Journal of Emerging and Selected Topics in Power Electronics 2020-07-20

An active-passivation p-GaN gate HEMT (AP-HEMT), featuring an active passivation layer extending into the drain-side access region, is demonstrated on a commercial E-mode p-GaN/AlGaN/GaN heterostructure wafer. The (APL) electrically connected to gate, and thus can supply/release mobile holes through electrode. in APL effectively shields overlaying surface traps from depleting underlying 2DEG channel, results much improved dynamic <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML"...

10.1109/led.2022.3222170 article EN IEEE Electron Device Letters 2022-11-14

In this work, we manifest that the epitaxial structure for p-GaN gate high-electron-mobility transistor is a versatile platform to develop electronics operating in an extremely wide temperature range (X-WTR) from 2 675 K, with comprehensive X-WTR studies on device operation and circuit behaviors. The key enabler high-temperature bandgap substantially suppresses thermal excitation of intrinsic carrier. However, low-temperature side, two-dimensional electron hole gas (2DEG 2DHG) channels at...

10.1063/5.0184784 article EN Applied Physics Letters 2024-01-22

The withstand capability and threshold voltage (VTH) instability of 1.2-kV silicon carbide (SiC) MOSFETs under repetitive short circuit (SC) tests are investigated. An SC test system is constructed to apply stress SiC measure the transfer I-V characteristics gate-to-source leakage current (I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">GSS</sub> ) after each set tests. To evaluate capability, with different durations (t...

10.1109/jestpe.2019.2912623 article EN IEEE Journal of Emerging and Selected Topics in Power Electronics 2019-04-25

A gallium nitride (GaN) ring oscillator based on high-performance one-chip complementary logic (CL) inverters is demonstrated a conventional p-GaN gate power HEMT (high-electron-mobility transistor) platform. It manifests the feasibility of multiple-stage monolithic integration GaN CL gates, most energy-efficient digital circuit configuration, and consequently potential deploying circuits in all-GaN as peripheral with higher energy efficiency. Thanks to successful enhancement-mode p-channel...

10.1109/led.2020.3039264 article EN IEEE Electron Device Letters 2020-11-19

GaN power IC's are expected to help unlock the full potential of electronics, especially in terms promoting high-frequency switching applications. This paper first discusses a integration technology platform based on commercially available p-GaN gate HEMT technology. An integrated driver is presented as an example IC with enhanced performance, which bootstrap unit adopted realize rail-to-rail output voltage and fast speed. To deal GaN-specific design issues such unique dynamic V <sub...

10.1109/iedm13553.2020.9372069 article EN 2021 IEEE International Electron Devices Meeting (IEDM) 2020-12-12

A closely coupled double-channel (DC) structure realized on an 8-inch GaN-on-Si wafer is utilized to fabricate GaN high-electron-mobility-transistors (HEMTs) with enhanced RF linearity. The strong channel-to-channel coupling from this DC enables efficient transport of electrons between the two parallel channels accommodate balanced carrier concentration and current density channels. Consequently, nonlinearity source resistance under high operations external bias dependence cut-off...

10.1109/led.2021.3087785 article EN IEEE Electron Device Letters 2021-06-09

Beta-phase gallium oxide (β-Ga2O3) has attracted increasing attention in the field of power electronic devices due to its ultra-wide bandgap and high Baliga figure-of-merit. However, premature breakdown deteriorated with increase device area, hindering scale-up current rating. In this work, we unveil formation characteristics killer defects responsible for an Si-doped (001) β-Ga2O3 epitaxial layer grown by halide vapor phase epitaxy. The feature a line-shaped morphology along [010]...

10.1063/5.0244107 article EN Applied Physics Letters 2025-01-06

In this letter, we investigated the threshold voltage V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">TH</sub> stability under reverse-bias step-stress in E-mode LPCVD-SiNx/PECVD-SiNx/GaN MIS-FET. Under OFF-state stress with same net gate-todrain (VGD), shift shows an obvious dependence on negative gate bias. With a xmlns:xlink="http://www.w3.org/1999/xlink">GS</sub> of 0 V, is small and recoverable, while shifts are substantially larger more...

10.1109/led.2018.2791664 article EN IEEE Electron Device Letters 2018-01-10

Abstract Various 2D/3D heterostructures can be created by harnessing the advantages of both layered two-dimensional semiconductors and bulk materials. A semiconducting gate field-effect transistor (SG-FET) structure based on is proposed here. The SG-FET demonstrated an AlGaN/GaN high-electron mobility (HEMT) adopting single-layer MoS 2 as electrode. effectively turn off HEMT without sacrificing subthreshold swing breakdown voltage. Most importantly, deliver inherent over-voltage protection...

10.1038/s41699-019-0106-6 article EN cc-by npj 2D Materials and Applications 2019-06-13

The threshold voltage (VTH) of an enhancement-mode Schottky-type p-GaN gate high-electron-mobility transistor (HEMT) is found to have a special dependence on the drain bias. device commonly requires higher switch from high-drain-voltage off-state than what expected static characteristics. reason behind dynamic VTH has been proved be floating layer, where charges could stored and further influence under different In this article, SPICE-compatible equivalent circuit model presented according...

10.1109/tpel.2020.3030708 article EN IEEE Transactions on Power Electronics 2020-10-13

A hybrid field-effect transistor (HyFET), superior for power electronic applications, can be created by harnessing the merits of two representative wide-bandgap semiconductors, gallium nitride (GaN) and silicon carbide (SiC). Yet, incompactness in epitaxy techniques hinders development HyFET-GaN is usually grown on on-axis foreign substrates including SiC, whereas SiC homoepitaxy prefers off-axis substrates. This work presents a GaN-based heterostructure epitaxially conventional 4° 4H-SiC...

10.1002/adma.202201169 article EN Advanced Materials 2022-04-02

A 1200-V/100-mΩ silicon carbide (SiC) junction field-effect-transistor (JFET)/ gallium nitride (GaN) high-electron-mobility-transistor (HEMT) hybrid power switch is demonstrated, which features a flip-chip copackaged cascode configuration incorporating vertical SiC JFET and lateral GaN-HEMT. The high-voltage SiC-JFET provides the blocking capability while low-voltage GaN-HEMT enables normally-off gate control with superior switching characteristics. Compared to conventional...

10.1109/tpel.2020.2971789 article EN IEEE Transactions on Power Electronics 2020-02-05

The low-temperature gate reliability of Schottky-type p-GaN AlGaN/GaN heterojunction field-effect transistors under forward voltage stress is investigated. Both temperature-accelerated and voltage-accelerated time-dependent breakdown experiments are performed. exhibits a shorter time-to-failure at lower temperature. It found that the “use conditions” predicted by acceleration tests high bias could be overestimated low temperatures. Such discrepancy stems from distinct dominant leakage...

10.1063/5.0007763 article EN Applied Physics Letters 2020-06-01

Short circuit (SC) capability of 650-V Schottky-type p-GaN gate high-electron-mobility transistors (HEMTs) under single and repetitive tests is characterized in this article. The investigated devices exhibit strong a SC test, but weak with bus voltage 400 V drive 6 V. failure mechanism revealed through electrothermal simulation microscale spot analysis. Thermal fatigue cracks are formed due to the high temperature spike local fluctuations narrow GaN channel buffer layers, leading capability....

10.1109/tie.2020.3009603 article EN IEEE Transactions on Industrial Electronics 2020-07-21

Hot electrons with high kinetic energy could be generated in the channel of GaN high-electron-mobility transistors (HEMTs) during hard switching operation. Those "lucky" hot scattered to vulnerable interface between passivation and barrier layers bombard region create new defects that would lead degradation dynamic on-resistance ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${R}_{ON}$...

10.1109/led.2022.3195489 article EN IEEE Electron Device Letters 2022-08-05

We demonstrate significantly improved photovoltaic response of monolayer molybdenum disulfide (MoS2)/indium phosphide (InP) van der Waals heterostructure induced by graphene quantum dots (GQDs). Raman and photoluminescence measurements indicate that effective charge transfer takes place between GQDs MoS2, which results in n-type doping MoS2. The effect increases the barrier height at MoS2/InP heterojunction, thus averaged power conversion efficiency solar cells is from 2.1% to 4.1%. light...

10.1063/1.4946856 article EN Applied Physics Letters 2016-04-18
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