Seyed Arash Katourani

ORCID: 0000-0002-3721-0496
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About
Contact & Profiles
Research Areas
  • Medical Imaging Techniques and Applications
  • CCD and CMOS Imaging Sensors
  • Energy Harvesting in Wireless Networks
  • Radio Frequency Integrated Circuit Design
  • Advancements in Semiconductor Devices and Circuit Design
  • Radiation Detection and Scintillator Technologies
  • Age of Information Optimization
  • Particle Detector Development and Performance
  • Advanced Memory and Neural Computing
  • Atomic and Subatomic Physics Research
  • Analog and Mixed-Signal Circuit Design
  • Advanced X-ray and CT Imaging
  • Semiconductor materials and devices

Université de Sherbrooke
2025

Shahid Beheshti University
2022

We present LUCAS (Low power Ultra-low jitter Compact ASIC for SiPM), an analog front-end Silicon Photomultipliers (SiPM) targeting fast timing detectors in Time-of-Flight Computed Tomography (ToF-CT). features a very low input impedance preamplifier followed by voltage comparator. It is designed TSMC 65 nm low-power CMOS technology with supply of 1.2 V. Our first 8-channel prototype has been sent to fabrication and will be received August 2023. Post-layout simulations predict less than 40 ps...

10.48550/arxiv.2501.07595 preprint EN arXiv (Cornell University) 2025-01-09

This paper presents the design, implementation, and performance evaluation of LUCAS, a low-power, ultra-low jitter ASIC optimized for SiPM readout in Time-of-Flight Computed Tomography (ToF-CT) applications. Leveraging novel preamplifier design with low input impedance current-mode operation, LUCAS addresses challenges such as parasitic capacitance SiPMs high-speed detection requirements. The ASIC, fabricated TSMC 65nm CMOS technology, features eight channels an integrated comparator,...

10.48550/arxiv.2502.02762 preprint EN arXiv (Cornell University) 2025-02-04

<title>Abstract</title> This paper presents a novel design methodology for transimpedance amplifier (TIA) featuring low input resistance. The resistance of the proposed TIA is achieved through implementation various analog circuit techniques, such as regulated cascode (RGC) and flip voltage follower (FVF), further enhanced by advantages BiCMOS technology. A key characteristic its ability to maintain consistently impedance across high frequencies without exhibiting inductive behavior or...

10.21203/rs.3.rs-6303963/v1 preprint EN cc-by Research Square (Research Square) 2025-04-01

10.1016/j.aeue.2022.154140 article EN AEU - International Journal of Electronics and Communications 2022-02-03

We present LUCAS (Low power Ultra-low jitter Compact ASIC for SiPM), an analog front-end Silicon Photomultipliers (SiPM) targeting fast timing detectors in Time-of-Flight Computed Tomography (ToF-CT). features a very low input impedance preamplifier followed by voltage comparator. It is designed TSMC 65nm low-power CMOS technology with supply of 1.2 V. Our first 8-channel prototype has been sent to fabrication and will be received August 2023.Post-layout simulations predict less than 40 ps...

10.1109/nssmicrtsd49126.2023.10338565 article EN 2023-11-04
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