As a common mental disorder, depression has attracted many researchers from affective computing field to estimate the severity. However, existing approaches based on Deep Learning (DL) are mainly focused single facial image without considering sequence information for predicting scale. In this paper, an integrated framework, termed DepNet, automatic diagnosis of that adopts images videos is proposed. Specifically, several pretrained models adopted represent low-level features, and Feature...

Abstract Sliding mode‐based learning control is presented for T‐S fuzzy system. A model with both uncertainties and unmodeled dynamics proposed firstly, in which the information of are assumed to be unknown. Then, according a given reference model, state‐tracking error system built. Respecting facts, input matrices built different from each other. An extended state observer estimating unknown dynamics, corresponding sliding surface proposed. controller then closed loop Moreover, numerical...

Harris is one of the most widely used corner detection algorithms which based on intensity. Because practice Gaussian smoothing link, algorithm has a good performance its stability and robustness, but it also direct reason limitation computing speed. Furthermore, positioning accuracy T-type, L-type Arrow-type corners low. In this paper, an improved presented to solve efficiency problem algorithm. Firstly, we integrated response function MIC into reduce calculation amount so that speed...

Noninvasive preoperative prediction of histological grading is essential for clinical management cerebral glioma.This study aimed to investigate the association between image quality assessment 1H magnetic resonance spectroscopy and accurate glioma.98 glioma patients confirmed by pathology were retrospectively recruited in this single-center study. All underwent 1H-MRS examination at 3.0T before surgery. According WHO standards, all cases divided into two groups: low-grade (grade I II, 48...

Abstract To ensure the ship navigation safety, it is necessary to detect targets in background of sea clutter around ship. The most commonly used target detection equipments for are marine radar and automatic identification system (AIS) device. However, echoes often mixed with multiple clutter, weak not always equipped AIS device, neither provides information low accuracy, leading difficulty detection. Moreover, existing monitoring systems accustomed using traditional fusion methods...

This paper presents a novel configurable boundary-scan circuit (CBSC) of SRAM-based field programmable gate array (FPGA). The embedded SRAM cells FPGA have been used to modify the original structure (BSC). Users only need change data stored in cell during configuration chip. In this way, chain can be configured any desired length. Compared with BSC, using 0.25μm CMOS process part standard digital library and has BQV series FPGAs BMTI.

As one of the key technologies Honeywell, aeronautical radio incorporated (ARINC) 659 bus is popular in current space-borne computers. However, Honeywell does not design ARINC controller separately, and there are only a few papers about FPGA-based controllers. Accordingly, to promote extremely high performance needs computers, this paper designs an chip which integrates two independent interface units (BIUs), 8-bit MCU, several peripheral interfaces (i.e., UART, SPI, I2C). Because BIUs...

With the decreasing size of manufacturing process, scale island-style field programmable gate array (FPGA) becomes larger, which leads to increasing complexity FPGA routing resources, especially hex interconnect points (PIPs). Hex PIPs span six tiles have complex rules. Accordingly, research on complete test is rarely involved in study resources test. Therefore, this paper analyzes architecture FPGA, summarizes rules mathematically a two-dimensional coordinate system, and presents two proper...

Dynamic reconfiguration system allows us to dynamically allocate hardware resources as needed by particular applications. This paper focuses on the application of FPGA-based partial dynamic (PDRS) with configurable boundary-scan circuit (CBSC), which can be used in many different fields, especially military and aerospace fields. Generally speaking, if an important function such key encryption needs changed a PDRS operating high security system, corresponding logic need verified tested again...

Memory used for storing the configuration bitstream of field programmable gate array in space applications often encounters single event upset problems, which may disrupt integrity data memory and lead to unpredictable failures. For commercial memories low Earth orbit (LEO), single-bit errors double-byte account a large proportion. Meanwhile, error detection correction (EDAC) schemes, e.g., triple modular redundancy, linear block codes, scrubbing, combination these are very popular LEO...

Abstract The reconfigurable capability of static random‐access memory (SRAM) field programmable gate array (FPGA) can be used for its fault self‐repair method. As a machine learning method, the genetic algorithm (GA) is an FPGA repair method that automatically executed on‐orbit without any ground support. However, GA‐based has disadvantages, such as dependency on processors, knowledge requirement user designs in FPGAs, and small size repaired circuits. To address these issues, this paper...

This paper presents a system-level radiation-hardened method for universal FFT chip, with which radiation-sensitive elements are hardened precisely, chip's reliability is further improved by frame independent processing technology, and irradiation experiment simplified. chip realized 0.18μm CMOS process, excellent anti-irradiation performance.

With the rapid development of integrated circuit manufacturing technology and radar technology, demand for miniaturisation, low power consumption, real‐time performance synthetic aperture (SAR) imaging system is becoming higher higher. By designing reconfigurable IP cores configuring parameters through CPU, a missile‐borne SAR SoC chip based on reuse designed to meet this urgent demand. Using 0.13μm CMOS process, has been taped out verified successfully. Compared with traditional ‘DSP +...

The amount of radar's raw echo data is usually very large. At the same time, synthetic aperture radar (SAR) imaging system needs rapid transpose efficiency to improve real-time performance system. Therefore, modern SAR requires high-speed and large-capacity devices which are SDRAM chips store solve corner turning problem by efficient matrix method. By designing interleaved patterns controlling command cycles in a reasonable way, this paper presents novel method can be used memory (CTM) for...

This paper designs an engineering realisation of Doppler parameters estimation circuit for synthetic aperture radar (SAR) imaging system based on motion compensation. The algorithms centroid frequency and rate estimations are selected in advance. By optimising the mapping process from algorithm to hardware selecting proper floating-point data bit width, logical resources can be reduced significantly. Verified with FPGA-based PCB platform, proposed design works properly controllable computing error.