Power transformers are the vital and expensive components of power system. Timely identifying diagnosing transformer faults is critical to maintaining stability grid. As a sensitive economical tool, frequency response analysis (FRA) method has been widely employed detect winding faults. However, it still challenge accurately identify fault types degrees only by FRA method. In this article, new diagnosis that combines with kernel-based extreme learning machine (KELM) optimized seagull...

Abstract In this paper, an equipment management system based on Bluetooth Angle of Arrival (AoA) technology is proposed, aiming at realizing high-precision localization and real-time monitoring materials in military warehouses. By designing improved antenna switching strategy, optimizing the array layout, introducing e-map e-fence technologies, study dedicated to solving problem insufficient positioning accuracy existing improving practicality value system. addition, corresponding algorithms...

Live video streaming over vehicular ad hoc networks (VANET) is an attractive feature to many applications, such as emergency live transmission, road-side advertisement broadcasting and inter-vehicle conversation. Though vehicles have ample bandwidth, computation storage capacity support data intensive communication, the high mobility may cause persistent network partition. The performance of suffers from delay packet loss incurred by long time disconnection. Although solutions been proposed...

Fitness is a measure of human being's healthy status. With more and come out poverty today, people pursue fit lives through various ways such as reasonable nutrition, regular exercise sufficient sleep. improving smart wearables popularly with the prevalence Internet Things phones. There are glasses, wristbands, watches, gloves, clothes, hats shoes, etc. Typically, these form personal area network (PAN) based on Bluetooth around phone. In this survey, we studied underlying technologies for...

Device drivers are a principal source of failures in computer systems. Therefore, improving driver reliability greatly improves overall system reliability. However, development largely has to wait until first stable version the device becomes available. This dependency often leaves not enough time for validation. Recently, virtual machines and devices have found their way into early Virtual enable even before real become available bring complete observability trace ability that evade...

Robustness testing is a crucial stage in the device driver development cycle. To accelerate robustness testing, effective fault scenarios need to be generated and injected without requiring much time human effort. In this paper, we present practical approach automatic runtime generation injection of for testing. We identify target functions that can fail from execution traces, generate on these using bounded trace-based iterative strategy, inject at test permutation-based mechanism. have...

Although concolic testing is increasingly being explored as a viable software verification technique, its adoption in mainstream development and the industry not yet extensive. In this paper, we discuss challenges to widespread of an industrial setting highlight further opportunities where can find renewed applicability.

Spatiotemporal predictive learning methods generally fall into two categories: recurrent-based approaches, which face challenges in parallelization and performance, recurrent-free methods, employ convolutional neural networks (CNNs) as encoder-decoder architectures. These benefit from strong inductive biases but often at the expense of scalability generalization. This paper proposes PredFormer, a pure transformer-based framework for spatiotemporal learning. Motivated by Vision Transformers...

The paper presents an approach to model checking software system designs specified in xUML (http://www.kc.com/html/xuml.html), executable subset of UML. This is enabled by the execution semantics and based on automatic translation from S/R, input language COSPAN checker (R.H. Hardin et al., 1996). Model transformations are applied reduce state space resulting S/R that be verified COSPAN. An level logic for specifying properties checked defined. Automated support provided translating...

Behavioral synthesis is the compilation of an Electronic system-level (ESL) design into RTL implementation. We present a suite optimizations for equivalence checking generated through behavioral synthesis. The exploit high-level structure ESL description to ameliorate verification complexity. Experiments on representative benchmarks indicate that can handle synthesized designs with tens thousands lines RTL.

This paper presents an approach to integration of model checking into component-based development software systems. assists in highly reliable systems and reduces the complexity verifying these by utilizing their compositional structures. Temporal properties a component are specified, verified, packaged with component. Selection for reuse considers not only its functionality but also temporal properties. When is composed from other components, property verified on abstraction The constructed...

This paper formulates and illustrates the integration of resource safety verification into a design methodology for development verified robust real-time embedded systems. Resource-related concerns are not closely linked with current xUML model-based software although they critical We describe how to integrate analysis techniques early phase an xUML-based cycle. Our hybrid framework combines static runtime monitoring. A case study based on controller satellite simulation, TableSat, benefits...

Loop pipelining is a critical transformation in behavioral synthesis. It crucial to producing hardware designs with acceptable latency and throughput. However, it complex involving aggressive scheduling strategies for high throughput careful control generation eliminate hazards. We present an equivalence checking approach certifying synthesized the presence of transformations. Our works by (1) constructing provably correct pipeline reference model from sequential specification, (2) applying...

Post-silicon validation is a crucial stage in the system development cycle. To accelerate post-silicon validation, high-quality tests should be ready before first silicon prototype becomes available. In this paper, we present concolic testing approach to generation of with virtual prototypes. We identify device states under test from concrete executions based on concept transaction, symbolically execute these generate tests, and issue generated concretely device. have applied prototypes...