A5070335217- Photonic and Optical Devices
- Semiconductor Lasers and Optical Devices
- 3D IC and TSV technologies
- Electronic Packaging and Soldering Technologies
- Silicon Carbide Semiconductor Technologies
- Advanced MEMS and NEMS Technologies
- Advanced Fiber Optic Sensors
- Photonic Crystals and Applications
- Advanced Photonic Communication Systems
- Microfluidic and Bio-sensing Technologies
- Microfluidic and Capillary Electrophoresis Applications
- Aluminum Alloys Composites Properties
- Semiconductor materials and devices
- Laser Material Processing Techniques
- Electrowetting and Microfluidic Technologies
- Electrical and Thermal Properties of Materials
- Electromagnetic Compatibility and Noise Suppression
- Advanced Sensor Technologies Research
- Neuroscience and Neural Engineering
- Additive Manufacturing Materials and Processes
- Microwave Engineering and Waveguides
- Material Selection and Properties
- Radio Frequency Integrated Circuit Design
- Optical Coatings and Gratings
- Injection Molding Process and Properties
International Energy Research Centre
2016-2024
University College Cork
2016-2024
Agency for Science, Technology and Research
2013-2017
Institute of Microelectronics
2013-2017
Singapore Science Park
2014-2017
National University of Ireland
2016
Dedicated multi-project wafer (MPW) runs for photonic integrated circuits (PICs) from Si foundries mean that researchers and small-to-medium enterprises (SMEs) can now afford to design fabricate chips. While these bare Si-PICs are adequate testing new device circuit designs on a probe-station, they cannot be developed into prototype devices, or tested outside of the laboratory, without first packaging them durable module. Photonic PICs is significantly more challenging, currently orders...
The SiC based high power 3 phase inverter module with double side cooling structure was developed. By applying flipchip bonding of DMOSFET device on DBC substrate, the source and gate could be achieved. drain interconnection done by copper clip attach. developed can provide flat for both top bottom surfaces, which effectively utilized design heat dissipation. In addition to capability, temperature endurable material set endure over 220°C junction such as interconnection, encapsulation TIM...
In this paper, authors developed miniaturizeddouble side cooling packaging for SiC (silicon carbide) highpower inverter module using new material solutions towithstand high temperature condition over 220oC. Instead ofconventional thick wire bonding on the device, flip chipbonding power source and gate interconnections aredeveloped. For drain interconnection, copper clips areattached endurable interconnectionmaterials. By utilizing these flip-chip structures, powermodule with double design...
In this paper, a 3-D integrated 77-GHz automotive radar front-end is presented. Embedded wafer level packaging (EMWLP) technology proposed to eliminate the use of wire bonding, which not only introduces significant radio frequency loss, but also occupies large footprint for high-pin count die. The transceiver bare die embedded in reconfigured molded with compression molding process. Double-sided multiple redistribution layers are formed fan-out input/output signals and through mold via...
We report on the flip chip packaging of Micro-Electro-Mechanical System (MEMS)-based digital silicon photonic switching device and characterization results 12 × ports. The challenges in N <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> electrical 2N optical interconnections are addressed with single-layer redistribution lines 25 μm line width space aluminum nitride interposer 13° polished 64-channel lidless fiber array (FA) a pitch 127...
We design and fabricate the packaging of 128 × silicon photonic MEMS switch device using through glass via (TGV) interposer pitch reducing fibre array. The contains 16384 cells 272 grating couplers spaced at 63.5 μm in a compact footprint 17.4 mm 16 mm. apodised designed for 1300 nm have an insertion loss 2.5 dB/facet 10° coupling angle. 0.5 thick 512 electrical vias while optical array is polished to 40° planar coupling.
As oil and gas industries ventured further deeper into the earth or ocean in search for new reservoirs, requirements of depth, pressure temperature are ever expanding. Conventionally, ceramic based hermetic sealed packaging is used high endurable package. However, case highly pressurized application, stress on package substantial hermetically cannot survive under a up to 30kpsi. To overcome this limitation, authors proposing fill protective materials inside substrate cavity absorb internal...
Silicon carbide based power modules are receiving more attention due to their performance advantages over traditional silicon modules. The demanding operation requirements such as higher output, faster switching speed, and working temperature present great thermal management challenge, which necessitates the analysis characterization of various interface bonding layers cooling technologies. In work, a new 3-phase SiC DMOSFET module is developed with six dies copper clips, corresponding...
Ag sintering has been widely studied as a lead-free die attach solution for power electronics. A soak time of dozen minutes at the temperature is necessary to establish strong bond strength by conventional heating method. Chemical bonding can be achieved various parameters associated with metallurgical adjacent surfaces. In this study, attaching technology between Au coated Si and substrate was developed applying materials which work up 350°C. It concentrated on finding so called...
Grating couplers are widely used optical interfaces in integrated photonics, especially on the Silicon-On-Insulator (SOI) platform. Their design has been optimized for coupling light between a Photonic Integrated Circuit (PIC) and single-mode fiber, μlens free space transport, or even second PIC same SOI In this work, we co-design matching pairs of grating-couplers distinct InP photonic platforms PIC-to-PIC coupling. By scattering strengths two grating-couplers, show that insertion loss 3dB...
Lead-free solder alloys for high temperature applications is required to meet increasing demands reliable replacements lead-based alloys. Especially, bonding in power electronics packages where first on a lead-frame performed at of about 330 °C. In this study, the SiC based TO-220 package was developed by applying endurable material sets which can endure over 220°C device junction temperature. The interfacial reaction and reliability die attachment Ni plated lead frames using Zn-Al...
We report on the first electrical and optical packaging of digital silicon photonic MEMS switches with 12×12 ports, 13~18dB fiber-to-fiber loss, 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-11</sup> BER for 10-Gb/s datastream, 0.4μs switch reconfiguration time, <;1.6V (5%) switching voltage variations.
There are five types of die attach materials with high melting point (>250°C) evaluated in this study, these lead (Pb95.5Sn2Ag2.5) solder paste, Gold Tin (Au80Sn20) pressure-less Silver (Ag) sintered pressure type silver (P-Ag) paste and Germanium (Au88Ge12) perform solder. The reliability tests included temperature storage (HTS) at 250°C/500hours N2 purge cycling for 500cycles −65°C to 150°C. Majorities the test vehicles have good shear mode (Silicon crack) after tests. Only mix modes...
In this paper, the power cycling simulation model was built up to study thermo-mechanical reliability of electronic package test vehicle with single metal layer flexible substrate. The includes thermal analysis and analysis. temperature distribution high obtained by stress strain behaviors die attach materials Al bonding wires were investigated coupled simulation. fatigue lives estimated plastic-strain based Coffin-Manson life prediction model. effects materials, epoxy molding compound (EMC)...
Consumers' thirst for data has led to the development of various silicon photonic switching devices that are highly scalable while maintaining their relatively compact form factor at same time. This demands a paradigm shift in way these being packaged, as optical and electrical ports involved. In this article, we proposed pluggable MEMS switch package with passive coupling assembly. approach shifts fibre away from package, keeping it "purely electrical." The concept is separately...
we demonstrate how micro-mirrors can enable surface-normal coupling of light to a photonic integrated circuit (PIC) equipped with edge couplers. Most are fabricated using etching techniques crystallographic direction dependency, long processing times, and high fabrication costs. This study fabricates 45 ± 2° etching-free micro-mirror at the wafer level dicing e-beam metal evaporation methods. The root-mean-square (RMS) surface roughness Au-deposited diced μ-mirror is as low 9 0.65 nm an...