A5039159197- Advancements in Semiconductor Devices and Circuit Design
- Semiconductor materials and devices
- Integrated Circuits and Semiconductor Failure Analysis
- Photonic and Optical Devices
- Ferroelectric and Negative Capacitance Devices
- Transportation Planning and Optimization
- Semiconductor Lasers and Optical Devices
- Semiconductor Quantum Structures and Devices
- Silicon Carbide Semiconductor Technologies
- Traffic Prediction and Management Techniques
- Human Mobility and Location-Based Analysis
- Nanowire Synthesis and Applications
- Urban Transport and Accessibility
- Silicon and Solar Cell Technologies
- Semiconductor materials and interfaces
- Advanced Photonic Communication Systems
- Air Quality Monitoring and Forecasting
- Maritime Transport Emissions and Efficiency
- Time Series Analysis and Forecasting
- Thin-Film Transistor Technologies
- Reservoir Engineering and Simulation Methods
- Maritime Navigation and Safety
- GaN-based semiconductor devices and materials
- Atmospheric and Environmental Gas Dynamics
- Maritime Ports and Logistics
Beijing Jiaotong University
2018-2020
The University of Texas at Austin
1994-2019
Bureau of Economic Analysis
2019
IBM Research - Thomas J. Watson Research Center
2001-2010
IBM (United States)
2003-2010
Advanced Micro Devices (Canada)
2008
We report the fabrication and characterization of high-speed germanium on silicon-on-insulator lateral PIN photodetectors. At an incident wavelength 850 nm, 10 ×10-μm detectors with finger spacing S 0.4 μm (0.6 μm) produced a -3-dB bandwidth 29 GHz (27 GHz) at bias voltage -1 V. The S=0.6 had external quantum efficiency 34% nm 46% 900 dark current 0.02 μA -1-V bias.
FinFET integration challenges and solutions are discussed for the 22 nm node beyond. Fin dimension scaling is presented importance of sidewall image transfer (SIT) technique addressed. Diamond-shaped epi growth raised source-drain (RSD) proposed to improve parasitic resistance (R <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">para</inf> ) degraded by 3-D structure with thin Si-body. The issue V xmlns:xlink="http://www.w3.org/1999/xlink">t</inf>...
Bus operation scheduling is closely related to passenger flow. Accurate bus flow prediction can help improve urban planning and service quality reduce the cost of operation. Using machine learning algorithms find rules has become one research hotspots in field public transportation, especially with rise big data technology. IC card are an important resource more valuable comparison manual survey data. Aiming at balance between efficiency accuracy for multiple lines, we propose a novel model...
Highly scaled FinFET SRAM cells, of area down to 0.128 m <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> , were fabricated using high-kappa dielectric and a single metal gate demonstrate cell size scalability investigate V <sub xmlns:xlink="http://www.w3.org/1999/xlink">t</sub> variability for the 32 nm node beyond. A single-sided ion implantation (I/I) scheme was proposed reduce variation Fin-FETs in cell, where resist shadowing is...
<para xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> An extremely low contact resistivity of <formula formulatype="inline"><tex Notation="TeX">$\hbox{6} {-} \hbox{7} \times \hbox{10}^{-9}\ \Omega\cdot\hbox{cm}^{2}$</tex></formula> between Notation="TeX">$ \hbox{Ni}_{0.9}\hbox{Pt}_{0.1}\hbox{Si}$</tex></formula> and heavily doped Si is achieved through Schottky barrier engineering by dopant segregation. In this scheme, the implantation B or As...
To alleviate traffic congestion and traffic-related environmental pollution caused by the increasing numbers of private cars, public transport (PT) is highly recommended to travelers. However, there an obvious contradiction between diversification travel demands simplification PT service. Customized bus (CB), as innovative supplementary mode service, aims provide demand-responsive direct transit service travelers with similar demands. But how obtain accurate demands? It passive limited...
With the development of big data and deep learning, bus passenger flow prediction considering real-time becomes possible. Real-time traffic helps to grasp dynamics, provide early warning for a sudden support plan changes, improve stability urban transportation systems. To solve problem data, this paper proposes novel network model based on long short-term memory (LSTM) networks. The includes four parts: feature extraction Xgboost model, information coding historical decoding multi-layer...
Graded doping profile in the channel of vertical sub-100-nm nMOSFETs was investigated this study. Conventional single-step ion implantation used to form asymmetric graded channel. No large-angle-tilt implant is needed. The device processing compatible with conventional CMOS technology. In a graded-channel-doping device, higher near source, drain induced barrier lowering (DIBL) and off-state leakage current are reduced significantly. doped also has lower longitudinal electric field drain....
We present new physically based effective mobility models for both electrons and holes in MOS accumulation layers. These take into account carrier-carrier scattering, addition to surface roughness phonon fixed interface charge screened Coulomb scattering. The newly developed show excellent agreement with experimental data over the range 1/spl times/10/sup 16/-4/spl 17/ cm/sup -3/ which are available. Local-field dependent have also been holes, they implemented two-dimensional (2-D) device...
We have fabricated strained SiGe vertical P-channel and N-channel metal-oxide-semiconductor field-effect transistors (MOSFETs) by Ge ion implantation solid phase epitaxy. No Si cap is needed in this process because implanted after gate oxide growth. The MOSFETs are with a channel length below 0.2 /spl mu/m without sophisticated lithography the whole compatible regular CMOS process. enhancement for hole electron mobilities direction normal to growth plane of over that bulk has been...
Vertical npn BJTs on thin SOI with a partially or fully depleted collector are studied by 2-dimensional device simulations. It is found that compared to conventional bulk BJTs, the have reduced base-collector capacitance, higher Early voltage and breakdown voltage. A BJT fully-depleted can achieve f/sub max/ comparable current gain T/.
This paper provides an overview of IBM's recent results on Ge-on-insulator (GOI) photodetector technology and describes their suitability for use in so-called "in-the-box" massively-parallel optical interconnects.
Understanding maritime network structure and traffic flow changes is a challenging task that must incorporate economic, energy, geopolitics, transportation, sciences. Crude oil the most imported energy in world. Investigating crude status predicting has great significance for global trade, especially key importing/exporting regions countries. To address this, system-based approach using long short-term memory graph convolution forecasting named LGCOTFF introduced. The constructs...
Ge has tremendous potential for high-speed operation at /spl lambda/=850 nm, an important wavelength short range highly-parallel interconnects, because the absorption length of is only a few hundred nm. However, thin Ge-on-Si detectors, film must be isolated from underlying Si in order to prevent collection slow carriers generated deep within substrate. In this work, we present results lateral PIN photodetectors fabricated using films deposited on ultra-thin silicon-on-insulator (SOI)...
Analysis of passenger travel habits is always an important item in traffic field. However, patterns can only be watched through a period time, and lot people by public transportation big cities like Beijing daily, which leads to large-scale data difficult operation. Using SPARK platform, this paper proposes trip reconstruction algorithm adopts the density-based spatial clustering application with noise (DBSCAN) mine each Smart Card (SC) user Beijing. For phenomenon that passengers swipe...
High permittivity (K) gate insulators are projected for sub-100 nm Si MOSFETs since direct tunneling will likely limit SiO/sub 2/ thicknesses to 1.0-1.5 nm. High-K avoid tunneling, but their larger physical introduce subtle capacitive coupling phenomena such as fringing-induced barrier lowering (FIBL) that can compromise off-state leakage. In this study, device simulation examines both on and drain current with very high-K sidewall spacers reveal new source-side boundary condition effects....
DC and RF performance of scaled n-channel Si/SiGe modulation-doped field effect transistors (n-MODFETs) grown by ultra-high vacuum chemical vapour deposition is reported. Devices with source-to-drain spacing 300 nm, gate length 80 nm (70 nm) displayed fmax=194 GHz (175 GHz) fT=70 (79 GHz).
High speed, efficient photodetectors are difficult to fabricate in standard silicon fabrication processes due the long absorption length of silicon. However, high performance servers will soon require dense optical interconnects with low cost and reliability, this trend favors monolithic receivers over hybrid counterparts. Recently, lateral PIN photodiode structures have been demonstrated CMOS technology little or no process modifications. Optical based on these detectors achieved record...
We report on the dc and RF characterization of laterally scaled, Si-SiGe n-MODFETs. Devices with gate length, L/sub g/, 80 nm had f/sub T/=79 GHz max/=212 GHz, while devices g/=70 T/ as high 92 GHz. The MODFETs displayed enhanced at reduced drain-to-source voltage, V/sub ds/, compared to Si MOSFETs similar ds/.
We will present recent results from our work on germanium-on-silicon photodetectors. demonstrate that the devices display high bandwidth and efficiency at 850 nm, could be suitable for future 40 Gb/sec optical interconnect applications.
A multiple-stage simulation procedure identifies, for the first time, location of secondary electrons that very efficiently produce gate currents in flash EEPROMs. The method incorporates both electron and hole Monte Carlo analysis to calculate this current without introducing additional fitting parameters. (I/sub g//I/sub d/) continues increase smaller channel length (50/spl times/ from L/sub g/-03.39 0.12 /spl mu/m) higher substrate doping (more than 6/spl when doubled) scaled, low-power memory.
The property of SiGe layers to control channel-initiated secondary electron (CHISEL) gate current is explored for the first time using 2-D Monte Carlo simulation. Novel planar and vertical flash memory cells show a 4/spl times/ enhancement in CHISEL injection, with up 93% electrons generated layers.
We present a novel fully-depleted SOI CMOS technology with dielectrically-isolated polysilicon back gates, achieved by double BOX substrate combined dual-depth shallow trench isolation. devices down to 30nm gate length are fabricated high-κ/metal gates. A isolation structure liners is shown achieve robust between and Effective control of V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">T</sub> demonstrated, which enables dual-V design power...
Simulations and experiments have been conducted to study the built-in longitudinal field effects in sub-100-nm graded Si/sub 1-x/Ge/sub x/ channel vertical PMOSFETs. Results are compared for two operation modes with source/drain (S/D) contacts interchanged, i.e., "normal" mode, which is favorable drift, "reverse" a retarding one. The linear drain current at V/sub DS/=-0.1 V found he very similar between modes. Furthermore, if body grounded, saturation current, as simulated, normal mode 20%...