T. Yamashita

ORCID: 0000-0001-7063-9772
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About
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Research Areas
  • Advancements in Semiconductor Devices and Circuit Design
  • VLSI and Analog Circuit Testing
  • Pulsed Power Technology Applications
  • Low-power high-performance VLSI design
  • Electrostatic Discharge in Electronics
  • Integrated Circuits and Semiconductor Failure Analysis
  • Advanced Machining and Optimization Techniques
  • Semiconductor materials and devices
  • Semiconductor Lasers and Optical Devices
  • Plasma Applications and Diagnostics
  • Recycling and Waste Management Techniques
  • Mineral Processing and Grinding
  • Microbial Inactivation Methods
  • 3D IC and TSV technologies
  • Ion-surface interactions and analysis
  • Thin-Film Transistor Technologies
  • Analog and Mixed-Signal Circuit Design
  • Embedded Systems Design Techniques
  • Radiation Effects in Electronics
  • Welding Techniques and Residual Stresses
  • Electrical Contact Performance and Analysis
  • CCD and CMOS Imaging Sensors
  • Sensor Technology and Measurement Systems
  • Particle Accelerators and Free-Electron Lasers
  • Calcium Carbonate Crystallization and Inhibition

National Institute of Technology, Kagawa College
2019-2023

Kumamoto University
1979-2019

Albany Technical College
2009

Sumco Corporation (Japan)
2007

Semiconductor Energy Laboratory (Japan)
2005

National Archives and Records Administration
2003

Hitachi (Japan)
2002

Panasonic (Japan)
2002

Hiroshima University
1983-1984

FinFET integration challenges and solutions are discussed for the 22 nm node beyond. Fin dimension scaling is presented importance of sidewall image transfer (SIT) technique addressed. Diamond-shaped epi growth raised source-drain (RSD) proposed to improve parasitic resistance (R <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">para</inf> ) degraded by 3-D structure with thin Si-body. The issue V xmlns:xlink="http://www.w3.org/1999/xlink">t</inf>...

10.1109/iedm.2009.5424366 article EN 2021 IEEE International Electron Devices Meeting (IEDM) 2009-12-01

A high performance 65 nm SOI CMOS technology is presented featuring 35 gate length, 1.05 oxide, enhancement from dual stress nitride liners (DSL), and 10 wiring levels with low-k dielectric offered in the first 8 levels. DSL shown to scale well larger seen than at 90 design rules. 0.65/spl mu/m/sup 2/ SRAM cell also presented. allows use Metal 1 instead of 2 for bit-line wiring, which lowers capacitance improves access times. functional dual-core microprocessor test chip containing 76Mb...

10.1109/.2005.1469238 article EN 2005-07-27

The effectiveness of phosphorus diffusion gettering (PDG) and related segregation coefficients for different metal impurities were measured applying thermal treatments in the temperature range 800-950 °C times. We used multi-crystalline mono-crystalline CZ p-type wafers with boron concentrations levels dislocations bulk micro-defects (BMD). In all sample types, Cu Ni we found complete investigated. case Fe, coefficient increases both increase extension time. is qualitatively changing when...

10.4028/www.scientific.net/ssp.131-133.399 article EN Diffusion and defect data, solid state data. Part B, Solid state phenomena/Solid state phenomena 2007-10-01

In this paper, we proposed a soft-error hardened latch (SEH-latch) scheme that has an error correction function in the fine process. To achieve this, designed two types of SEH-latch circuits and standard circuit using 130 nm 2-well, also 90 2-well CMOS processes. The demonstrated 2-order higher immunity through radiation test /spl alpha/-particles, 1-order neutron irradiation.

10.1109/cicc.2004.1358812 article EN 2004-11-30

The effects of voltage and current pulse durations underwater discharge on shock wave generation are reported. In this article, discharges were generated by using a magnetic compression (MPC) circuit. number the MPC circuit was varied from two compressions to one no compression; also capacitance an output peaking capacitor connected in parallel electrodes (load) 10 6 2 nF. As result, electric pulses with different rise time/duration variable peak voltages currents obtained applied generate...

10.1109/tps.2020.2992638 article EN IEEE Transactions on Plasma Science 2020-05-22

A cosmic-ray immune latch circuit is presented. The storage node separated into three electrodes, and the soft error on one can be corrected by other two, even if there a large long-lasting influx of radiation-induced charges. proved to have significant tolerance utilizing test chip.

10.1109/isscc.2004.1332809 article EN 2004-09-28

A new design methodology of high performance CMOS MPU that applies ultra-low VTH, which is necessary to improve circuit with low power supply voltage, discussed. The multi-V/sub TH/, the IDDQ measurement back bias control at temperature and technologies are applied in order speed up, without increasing background leakage, test. As a result, operation frequency 64 bit was successfully improved 340 MHz 560 lowering quality.

10.1109/cicc.2001.929773 article EN 2002-11-13

This paper describes a new recycling method for metal-coated plastics. Pulsed power technology was used to remove metal layer (aluminum) from CD-ROM. The progress of removal and the state discharge were investigated in detail. In addition, shadow picture including digital image processing estimate amount. A pulsed generator using magnetic pulse compression (MPC-PPG) with maximum storage energy 40 J/pulse used. applied concentric ring electrodes placed on Separation between about 35 mm....

10.1109/tdei.2017.006820 article EN IEEE Transactions on Dielectrics and Electrical Insulation 2017-12-01

Pure aragonite was synthesized from calcined scallop shells in a single step the presence of Mg2+ ions at ambient temperatures under controled CO2 flow rates. The seem to behave like catalyst form aragonite, since most remained solution. However, very small amounts selectively adsorbed onto surface fine calcite crystals inhibit further growth calcite. morphologies and sizes strictly controlled by reaction temperature. It characteristic property produce aggregated aragonite. This study...

10.2473/shigentosozai.118.553 article EN Shigen-to-Sozai 2002-01-01

The authors are investigating a new recycling method for metal and plastic from metal-coated plastics used as components of automobiles electronics. A CD-R was an example our work, with the separation by pulsed power (silver layer) (polycarbonate substrate) investigated. magnetic pulse compression generator maximum storage energy 40 J/pulse applied to gap between two ring electrodes placed on CD-R. progress removal silver layer observed at each voltage application. Results showed almost...

10.1109/ipmhvc.2016.8012846 article EN 2016-07-01

Electron density distribution during an alternative current gas tungsten arc generated under Mars-like atmosphere in a vacuum chamber was measured to clarify characteristics atmosphere. The electron by Abel inversion processing and infrared method for plasma diagnostic, which obtained the spectral radiance of arc. Measured results showed that electrode negative period spreader than on Earth. Moreover, its peak value about 2.5×1022 m-3, almost one order lower result

10.2207/qjjws.41.45s article EN QUARTERLY JOURNAL OF THE JAPAN WELDING SOCIETY 2023-01-01

A polysilicon thin-film transistor (TFT) data driver with redundancy is integrated an active-matrix-liquid-crystal display (AMLCD). Integration of peripheral drives has advantages over conventional AMLCDs such as easy testing and liberation from assembly, enabling fabrication a high-resolution LCD small pixel size. Because defect in monolithic results fatal line defect, required to improve yield. This consists blocks shift registers using CMOS DFF. By poly-silicon TFTs, sample hold time...

10.1109/isscc.1992.200440 article EN 2003-01-02

Recycling of electronic waste (E-waste) is an important subject from the viewpoint resource conservation and environmental protection. Recently, application pulsed power technology in recycling field has attracted considerable attention. We have been investigating metal separation CD-R as example metal-coated plastic, by applying with concentric ring electrodes. visualized discharges ultra-high-speed framing camera to clarify mechanism removal. During first shot a fan-shape discharge was...

10.1109/tdei.2019.007720 article EN IEEE Transactions on Dielectrics and Electrical Insulation 2019-03-18

Clock tree synthesis (CTS) is an essential technique for SoC design. A dynamic skew compensation proposed here, which relaxes the CTS requirements and contributes to both small low power operation. test chip has been fabricated using 0.13-/spl mu/m CMOS technology. Measured results show a 44% improvement from 100-ps initial skew. This can be easily implemented in current flow.

10.1109/icicdt.2005.1502576 article EN 2005-01-01

A new module technology,which we named "System module", has been developed. This module" consists of two or more LSI chips which are divided into optimized functions, and these stacked together opposite each other using small bumps by MBB technology, it is possible to treat with this like a single chip. enables one make system-LSI low cost high performance/functions. These bumps, taking the area pad arrangement, arranged on an active element VLSI have 15 /spl mu/m diameter, 30 pitch, bonded...

10.1109/cicc.1997.606662 article EN 2002-11-22

In 2010, Barack Obama, the former president of United States, announced sending humans to Red Planet in 2030s. Outposts and habitats will be set up future by welding technique. this study, effectiveness previous AC-GTA was investigated a like Mars atmosphere consisting only CO2 gas with pressure range from 600 1000Pa. order observe phenomena, arc appearances were filmed high-speed video camera. Furthermore, voltage current waveforms recorded evaluate stability. It found that cathode spots...

10.2207/qjjws.39.151 article EN QUARTERLY JOURNAL OF THE JAPAN WELDING SOCIETY 2021-01-01

A unidirectional FASTBUS Segment Interconnect has been designed. It passes operation from a cable segment to crate segment. Basic tests of the first version are finished.

10.1109/tns.1984.4333253 article EN IEEE Transactions on Nuclear Science 1984-01-01

Abstract Pulsed power generator using semiconductor switches have been developed. We developed switching module discrete type Silicon Carbide (SiC) Device for pulsed circuit. compare the SiC‐MOSFETs with conventional IGBTs. Both of devices loss increased when voltage get higher. The can input higher and has less in same voltage. Also, we investigate depend on di/dt at switching. permissible was than However, there is a limit to value di/dt. this reduced by applying magnetic assist. advantage...

10.1002/eej.23242 article EN Electrical Engineering in Japan 2019-09-19

Some FASTBUS modules have been produced and successfully tested at KEK. The test system consisted of a single backplane segment equipped with ancillary logic, two masters driven by the MC68000 microprocessor slaves which several read/write registers. A simple FASTBUS-CAMAC interface is also described.

10.1109/tns.1983.4332264 article EN IEEE Transactions on Nuclear Science 1983-01-01

10.1109/tns.1984.4333243 article EN IEEE Transactions on Nuclear Science 1984-01-01
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