A5067774586- Semiconductor materials and devices
- Thin-Film Transistor Technologies
- Advancements in Semiconductor Devices and Circuit Design
- Silicon and Solar Cell Technologies
- Integrated Circuits and Semiconductor Failure Analysis
- Semiconductor materials and interfaces
- Advanced Memory and Neural Computing
- Ferroelectric and Negative Capacitance Devices
- ZnO doping and properties
- Silicon Nanostructures and Photoluminescence
- Organic Electronics and Photovoltaics
- Nanowire Synthesis and Applications
- Organic Light-Emitting Diodes Research
- Electronic and Structural Properties of Oxides
- Silicon Carbide Semiconductor Technologies
- Advanced Sensor and Energy Harvesting Materials
- Ga2O3 and related materials
- Advanced Surface Polishing Techniques
- Chalcogenide Semiconductor Thin Films
- Laser Material Processing Techniques
- Quantum Dots Synthesis And Properties
- Electrostatic Discharge in Electronics
- CCD and CMOS Imaging Sensors
- Analytical Chemistry and Sensors
- GaN-based semiconductor devices and materials
Sungkyunkwan University
2016-2025
Samsung (South Korea)
2005-2022
Arizona State University
1999-2003
The band gap and defect states of MgO thin films were investigated by using reflection electron energy loss spectroscopy (REELS) high-energy resolution REELS (HR-REELS). HR-REELS with a primary 0.3 keV revealed that the surface F center (FS) was located at approximately 4.2 eV above valence maximum (VBM) width (EgS) 6.3 eV. bulk (FB) 4.9 VBM about 7.8 eV, when measured 3 electrons. From first-principles calculation, we confirmed peaks FS FB, induced oxygen vacancies. We also experimentally...
Abstract In this paper, we investigate the V th shift of p-type LTPS TFTs fabricated on a polyimide (PI) and glass substrate considering charging phenomena. The with PI positively after bias temperature stress test. However, rarely changed even increasing stress. Such positive results from negative fluorine stemmed under gate bias. fact, C–V characterization metal–insulator-metal capacitor reveals that at SiO 2 /PI interface depends applied material, which agrees well TCAD simulation SIMS...
N <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> O plasma treatment is widely implemented into the fabrication process of mass-produced amorphous oxide semiconductors for its effectiveness, simplicity, and cost efficiency. However, plasma-treated InGaZnO (a-IGZO) thin-film transistors (TFTs) have been reported to exhibit reliability issues due a nonideal threshold voltage ( <inline-formula xmlns:xlink="http://www.w3.org/1999/xlink">...
The band alignment of atomic layer deposited (HfZrO4)1−x(SiO2)x (x = 0, 0.10, 0.15, and 0.20) gate dielectric thin films grown on Si (100) was obtained by using X-ray photoelectron spectroscopy reflection electron energy loss spectroscopy. gap, valence offset, conduction offset values for HfZrO4 silicate increased from 5.4 eV to 5.8 eV, 2.5 2.75 1.78 1.93 respectively, as the mole fraction (x) SiO2 0.1 0.2. This increase in offsets, a function increasing fraction, decreased leakage current...
The electrical characteristics of bias temperature stress (BTS) induced in amorphous indium–gallium–zinc oxide thin-film transistors (a-IGZO TFTs) were studied. We analyzed the threshold voltage (VTH) shift on basis effects positive (PBTS) and negative (NBTS), applied it to stretched-exponential model. Both are considered as important factors instabilities a-IGZO TFTs, equation is well fitted condition. VTH for drain current–gate (IDS–VGS) curve flat-band (VFB) capacitance–voltage (C–V) move...
Abstract Defect depth profiles of Cu (In 1−x ,Ga x )(Se 1−y S y ) 2 (CIGSS) were measured as functions pulse width and voltage via deep-level transient spectroscopy (DLTS). Four defects observed, i.e., electron traps ~0.2 eV at 140 K (E1 trap) 0.47 300 (E2 hole ~0.1 100 (H1 ~0.4 250 (H2 trap). The open circuit (V OC deteriorated when the trap densities E2 increased. energy band diagrams CIGSS also obtained using Auger (AES), X-ray photoelectron (XPS), DLTS data. These results showed that...
High refractive index nanoparticle material was applied as a scattering layer on the inner side of glass substrate bottom emission organic light emitting diode (OLED) device to enhance extraction and improve angular color shift. TiO2 YSZ (Yttria Stabilized Zirconia; Y2O3-ZrO2) were examined high nanoparticles. The formed by coating method, which is generally used in commercial display manufacturing process. Additionally, planarization coated with same method. implemented endured, without...
In this paper, we propose a novel mechanism for the Vth shift of amorphous-indium gallium zinc oxide (a-IGZO) thin film transistors under negative bias illumination stress (NBIS). Three kinds IGZO TFTs with different gate dielectricsand valence band offsets (VBO) were used in experiment. Gate dielectric materials Al <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> O xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> , HfO and SiO ....
Abstract Flexible displays on a polyimide (PI) substrate are widely regarded as promising next-generation display technology due to their versatility in various applications. Among other bendable materials used panel substrates, PI is especially suitable for flexible its high glass transition temperature and low coefficient of thermal expansion. cured under temperatures (260 °C, 360 460 °C) was implemented metal–insulator–metal (MIM) capacitors, amorphous indium gallium zinc oxide (a-IGZO)...
This paper introduces the smallest dynamic random access memory (DRAM) cell, which was implemented using a new transistor structure, dual work function - buried channel array (DWF-BCAT). For first time, feature size of approximately 17 nm achieved for DRAM cell. In this study, novel cell gate oxide process that mitigates traps in and interface, whose dimensions scale concurrently, developed to fabricate DWF-BCAT. By utilizing three-step involving in-situ steam generation (ISSG) followed by...
The influence of channel type and doping on hysteresis in the current-voltage characteristics poly-Si thin-film transistors (TFTs) has been investigated using p-/n- intrinsic/B-doped TFTs. is greater p-channel than n-channel decreases but increases as doped with B. energy profiles border trap density show asymmetry, which lower half bandgap. difference between near bandedge midgap levels results good agreement effect density.
A study on the electrical characteristic analysis of solar cell diodes under experimental conditions varying temperature and frequency has been conducted. From current-voltage (I-V) measurements, at room temperature, we obtained ideality factor (n) for Space Charge Region (SCR) Quasi-Neutral (QNR) 3.02 1.76, respectively. Characteristics showed that value n (at SCR) decreases with rising QNR) increases same conditions. These are due to not only sharply increased SCR current flow but...
In this paper, the TCAD degradation model of IGZO using spatial distribution (X, Y) physical parameters is proposed for first time and confirmed according to various channel length, active thickness, bias stress conditions that agree with actual measurements. The asymmetric phenomenon source/drain sweep direction occurs when high VDS (> 40 V) applied a-IGZO TFT due local strong electric field in drain edge region channel. double side gate (DSG) structure, degree varies VTG, which influenced...