We present a wireless link system that uses millimeter-wave (MMW) photonic techniques. The transmitter in the consists of an optical 120-GHz MMW generator, modulator, and high-power emitter. A uni-traveling carrier photodiode (UTC-PD) was used as emitter order to eliminate electronic amplifiers. evaluated dependence UTC-PD output power on its transit-time limited bandwidth CR-time constant bandwidth, employed with highest for As generation, we developed generator generates pulse train one...

This paper describes the fabrication process of quarter-micrometer-gate fully depleted CMOS/SIMOX devices, which is characterized by a new lateral isolation technique that can easily achieve 30-nm-class surface planarization and 0.2-/spl mu/m-class with no degradation device characteristics. The distinctive feature this to use high-temperature two-step LOCOS oxidation. devices have 50-nm-thick body regions dual N/sup +//P/sup +/ poly-Si gates so they surely operate in mode. By applying CMOS...

There is a growing demand for high-resolution and high-reality cameras use in broadcasting, surveillance, various other systems. Conventional papers report on research development of 8K ultra-high-definition television (UHDTV) systems, full-resolution [1], 240fps that employ stacked sensors [2]. In these camera rolling-shutter method used scanning, since global-shutter has an area tradeoff between the photoelectric conversion region charge storage [3-5]. However, this leads to shutter...

We have developed organic photoconductive film (OPF) CMOS image sensors with pixel structures different from those of a conventional silicon sensors, in which, the thin for photoelectric conversion and charge storage part signal accumulation are completely independent. In this paper, we focus on two unique features OPF sensor: (1) technology that realizes over 120 dB simultaneous-capture wide dynamic range, (2) global shutter achieving high saturation signals per unit square is 10 higher...

2-GHz RF front-end circuits [low noise amplifier (LNA), mixer, and voltage-controlled oscillator (VCO)] enabling 0.5-V operation are presented. The were fabricated by 0.2-/spl mu/m fully depleted CMOS/SIMOX technology. mixer has an LC-tuned folded structure to avoid stacking transistors. Undoped-channel MOSFETs used in the VCO core a complementary source follower as output buffers for VCO. figures of 3.5 dB (LNA) 16.1 (mixer), IIP3 -6-dBm phase -110 dBc/Hz at 1-MHz offset (VCO) achieved...

This paper describes circuit techniques for energy-harvesting technology in millimeter-size ultra-low-power batteryless wireless sensor nodes as a front end BigData, IoT, M2M, and ambient intelligence. Power generated by energy harvester becomes small the nanowatt level when size of node millimeter-size. First, technical trends low-power circuits portfolio harvesting are discussed from viewpoints application issues. Then, — zero-power vibration sensing circuit, power management with MEMS...

Multi-threshold CMOS (MTCMOS) circuit technology combining low-Vth logic gates and high-Vth MOSFETs is suitable for 1 V LSIs battery-operated portable equipment. Improvements in MTCMOS device promise to lead higher operating frequencies. However, frequencies will increase power consumption even if the supply voltage V. To reduce consumption, it necessary lower below V, without sacrificing speed. A consisting of depletion-mode operates with 200 mV supply. cannot be applied an LSI more than k...

This paper describes an IC technology for high-speed wireless-link systems, using photonic techniques, which provides 10 Gb/s at 120 GHz. Optical signals are converted to electrical and radiated into freespace Si-based circuitry. Both the preamp PA utilize 0.1 /spl mu/m gate InAlAs/InGaAs HEMTs with gains of 6-10 dB 8.5 dB, respectively.

We realized a simultaneous-capture wide-dynamic-range image sensor with 3.0 μm pixels using novel in-pixel 3D capacitors located in BEOL. achieved high capacitance density of 41.7 fF/μm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> and low leakage current 3.6×10 xmlns:xlink="http://www.w3.org/1999/xlink">-10</sup> A/cm at 1 V by applying structure optimizing dielectric deposition process. TDDB investigations showed that estimated...

This paper proposes a multithreshold CMOS (MTCMOS) circuit that uses SIMOX process technology. MTCMOS/SIMOX combines fully depleted low-threshold logic gates and partially high-threshold power-switch transistors. The have large noise margin for fluctuations in operating temperature addition to high-speed operation at the low supply voltage of 0.5 V. transistor which body is connected gate through reverse-diode makes it possible obtain channel conductance active mode without any increase...

Minimizing supply voltage is one of the most effective ways to attain low-power RF circuits. These 2 GHz receiver front-end blocks operate down 0.5 V. They are a low noise amplifier (LNA), downconversion mixer, and voltage-controlled oscillator (VCO) fabricated by 0.2 /spl mu/m fully-depleted CMOS/SIMOX technology, which thin-film silicon-on-insulator (SOI) technologies. The V operation results from using two circuit techniques. One an LC-tuned folded Gilbert cell, other use undoped MOSFETs...

This paper describes an RGB-infrared (IR) organic CMOS image sensor with electrically controllable IR sensitivity. The sensitivities of all the pixels in sensor, which has structure two directly stacked layers a high resistance ratio, are simultaneously controlled by changing applied voltage to films. fabricated pixel pitch 3 μm, 2.1 Mpixels (1920 × 1080) both RGB and regions. can switch between color imaging modes frame without requiring mechanically retractable IR-cut filter.

The use of infrared (IR) imaging to view scenes otherwise invisible the human eye, simultaneously with visible-spectrum imaging, is increasingly interest for various applications such as in-vehicle, surveillance, and agricultural security cameras. loss spatial resolution in conventional RGB-IR sensors causes aliasing, because IR pixels are segmented within provided effective pixel area [1,2]. 3-D stacking photodiode arrays has been reported another strategy capture [3]; however, need bonding...

A low-voltage 6-GHz-band monolithic LC-tank VCO has been fabricated using 0.2-/spl mu/m CMOS/SIMOX process technology. The features a tuning-range switching technique to achieve wide tuning range. output frequency range is between 5.71 and 6.21 GHz owing the switch. With switch on or off, phase noise about -100 dBc/Hz at 1-MHz offset -120 10-MHz supply voltage of 2 V, can oscillate over 6.0 with 1.1-V voltage. In that case, also 1 MHz offset. dissipation current core 21.4 mA 2.0-V 7.4

We designed and fabricated an extremely low-power CMOS/SIMOX programmable counter large scale integrated circuits (LSI) for high-speed phase-locked loop (PLL) frequency synthesizer applications. This was to verify the potential usefulness of ultrathin-film 0.24-/spl mu/m-gate process technology creating LSI containing operating at frequencies least 1 GHz low supply voltages. While up 2.2 consuming only 4.5 mW 1.5 V, it is capable 4-GHz performance with power consumption 19 2.5 V. Even a...

Multithreshold-voltage CMOS (MTCMOS) has a great advantage of lowering physical threshold voltages without increasing the power dissipation due to large subthreshold leakage currents. This paper presents embedded SRAM techniques for high-speed low-power MTCMOS/SIMOX application-specified integrated circuits (ASICs) that are operated with single battery cell around 1 V. In order increase operating frequency, pseudo-two stage pipeline architecture is proposed. The address decoder using...

A 5 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">th</sup> -order switched-capacitor (SC) complex filter is implemented in 0.2-¿m CMOS technology. In order to reduce the die size and current consumption of filter, a novel SC integrator developed. The centered at 24.8 kHz with bandwidth 20.2 kHz. Image channel attenuated by more than 40 dB. in-band 3 xmlns:xlink="http://www.w3.org/1999/xlink">rd</sup> harmonic input intercept point (IIP3) 15...

A phase-locked loop (PLL) LSI containing a multi-GHz prescaler has been fabricated using 0.24-/spl mu/m-gate ultrathin-film CMOS/SIMOX technology combined on trial basis with synchrotron radiation X-ray (SR) lithography. While operating at up to 2.2 GHz and consuming only 4.5 mW 1.5 V, it is capable of 4-GHz performance power consumption 19 2.5 V. Even low supply voltage high input-sensitivity was also achieved in the 1- 2-GHz frequency range. These results suggest that sub-quarter-micron...

The triple-Vth CMOS/SIMOX circuit presented uses 0.25 /spl mu/m SIMOX devices with a small subthreshold swing to reduce leakage current in both the active and standby modes without speed degradation. A 16 b carry-lookahead adder scheme. logic gates critical carry-paths use low-Vth MOSFETs other non-critical paths are composed of medium-Vth MOSFETs. ratio MOSFET count is 1.3:1.0. Performance compared that an all using simulation. delay times at 0.5 V 5.2 ns for 4.5 low-Vth. power dissipations...

This paper describes a 1-V operation Bluetooth RF transceiver in 0.2-/spl mu/m CMOS SOI. The integrates radio-frequency transmit/receive switch, an image-reject mixer, quadrature demodulator, g/sub m/-C filters, LC-tank voltage-controlled oscillator, phase-locked loop synthesizer, and power amplifier. phase shifter the demodulator is tuned dynamically to track carrier-frequency drift allowed specification. m/ cell filters uses depletion-mode pMOS transistors. In order achieve operation,...

A micro-power active-RFID LSI with an all-digital RF-transmitting scheme achieves experimental 10-m-distance communication a 1-Mbps data rate in the 300-MHz frequency band. The IC consists of RF transmitter and power-supply circuit, which controls energy flow from battery to IC, offers intermittent operation transmitter. draws 1.6 μA 3.4-V supply is implemented 0.2-μm CMOS area 1 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> ....

A new phase-backed loop (PLL) with a simple architecture that overcomes the trade-off problem between acquisition time and phase noise was fabricated in 0.2 µm CMOS process. One-fifth of integer-N is achieved by switching only division ratio optimised damping factor to control natural frequency.

A fifth-order switched-capacitor (SC) complex filter was implemented in 0.2-µm CMOS technology. novel SC integrator developed to reduce the die size and current consumption of filter. The is centered at 24.73±0.15kHz (3δ) has a bandwidth 20.26±0.3kHz (3δ). image channel attenuated by more than 42.6dB. in-band third-order harmonic input intercept point (IIP3) 17.3dBm, referred RMS noise 34.3µVrms. consumes 350µA with 2.0-V power supply. 0.578mm2. Owing new integrator, achieves 27% reduction...