T. Yamada

ORCID: 0000-0003-4967-8106
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About
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Research Areas
  • Semiconductor materials and devices
  • Advancements in Semiconductor Devices and Circuit Design
  • Ferroelectric and Negative Capacitance Devices
  • Advanced Memory and Neural Computing
  • CCD and CMOS Imaging Sensors
  • X-ray Diffraction in Crystallography
  • Ferroelectric and Piezoelectric Materials
  • Crystallization and Solubility Studies
  • Semiconductor materials and interfaces
  • Advanced Chemical Sensor Technologies
  • Integrated Circuits and Semiconductor Failure Analysis
  • RNA Interference and Gene Delivery
  • Silicon and Solar Cell Technologies
  • Lipid Membrane Structure and Behavior
  • Silicon Carbide Semiconductor Technologies
  • Crystallography and molecular interactions
  • Thin-Film Transistor Technologies
  • Semiconductor Quantum Structures and Devices
  • Supramolecular Self-Assembly in Materials
  • Advanced X-ray Imaging Techniques
  • Infrared Target Detection Methodologies
  • Gas Sensing Nanomaterials and Sensors
  • Magnetic properties of thin films
  • Photovoltaic Systems and Sustainability
  • Advanced biosensing and bioanalysis techniques

Panasonic (Japan)
2001-2023

Tokyo Institute of Technology
2019-2022

Shibaura Institute of Technology
1995-2005

Rigaku (Japan)
2001

Toshiba (Japan)
1972

Surface-state effects on gate-lag or slow current transient in GaAs MESFETs are studied by two-dimensional (2-D) simulation. It is shown that the becomes remarkable when deep-acceptor surface state acts as a hole trap. To suppress it, deep acceptor should be made electron-trap-like, which can realized reducing surface-state density. Device structures expected to have less gate-lag, such self-aligned structure with n/sup +/ source and drain regions recessed-gate also analyzed. An analysis of...

10.1109/16.753696 article EN IEEE Transactions on Electron Devices 1999-04-01

We have developed a low-temperature formation technique for ferroelectrics (<500 °C), which is crucial the ferroelectric random access memory (FeRAM) to be embedded in leading-edge complementary metal oxide semiconductor (CMOS). A 53-nm-thick Bi4Ti3O12 film was successfully formed by metalorganic chemical vapor deposition at 450 °C and subsequent annealing 500 °C. It found that perovskite grains preferentially orient along (110) (111) directions fabricated capacitors show remnant...

10.1143/jjap.46.2157 article EN Japanese Journal of Applied Physics 2007-04-01

To meet the demand for digital signal processing of wideband video signals, a 40-MHz, 8-b ADC (analog/digital converter) with 105-mW power consumption on 4.88-mm/sup 2/ chip has been developed using 1.4- mu m standard-cell CMOS process. obtain fast conversion, uses sample-and-hold comparator an averaging feature differential linearity high-speed sampling and high-frequency inputs expanded fine comparison to increase conversion speed. The block diagram converter is shown together two...

10.1109/isscc.1989.48213 article EN 2003-01-13

A nondestructive readout (NDRO) FeRAM using a 0.18-/spl mu/m CMOS technology has been developed. Readout voltages across the ferroelectric lower than coercive voltage allowed to achieve high read endurance exceeding required performance for system LSIs, 10/sup 16/ cycles. The NDRO approach uses newly developed charge compensation technique correct process variations in threshold of neighboring transistors, leading wide operation margin over supply range from 1.1 1.8 V.

10.1109/ted.2005.859688 article EN IEEE Transactions on Electron Devices 2005-12-01

Nanosheets have thicknesses on the order of nanometers and planar dimensions in micrometer range. Nanomaterials that are capable converting reversibly between 2D nanosheets 3D structures response to specific triggers can enable construction nanodevices. Supra-molecular lipid their triggered conversions including vesicles cups reported. They produced from upon addition amphiphilic peptides cationic copolymers act as peptide chaperones. By regulation chaperoning activity copolymer, triggered,...

10.1002/adma.201904032 article EN Advanced Materials 2019-09-24

This paper describes an RGB-infrared (IR) organic CMOS image sensor with electrically controllable IR sensitivity. The sensitivities of all the pixels in sensor, which has structure two directly stacked layers a high resistance ratio, are simultaneously controlled by changing applied voltage to films. fabricated pixel pitch 3 μm, 2.1 Mpixels (1920 × 1080) both RGB and regions. can switch between color imaging modes frame without requiring mechanically retractable IR-cut filter.

10.1109/jssc.2017.2769341 article EN IEEE Journal of Solid-State Circuits 2017-12-04

The use of infrared (IR) imaging to view scenes otherwise invisible the human eye, simultaneously with visible-spectrum imaging, is increasingly interest for various applications such as in-vehicle, surveillance, and agricultural security cameras. loss spatial resolution in conventional RGB-IR sensors causes aliasing, because IR pixels are segmented within provided effective pixel area [1,2]. 3-D stacking photodiode arrays has been reported another strategy capture [3]; however, need bonding...

10.1109/isscc.2017.7870269 article EN 2022 IEEE International Solid- State Circuits Conference (ISSCC) 2017-02-01

Effects of substrate traps on turn-on characteristics GaAs MESFETs are studied by two dimensional (2-D) simulation. When the off-state gate voltage is much more negative than threshold (pinch off) and surface-state effects small, abnormal current overshoot subsequent slow transients observed for case with undoped semi-insulating including an electron trap: EL2. Even if pronounced to show large gate-lag, drain may overshoot-like behavior at relatively early periods. The Cr-doped a hole Cr...

10.1109/16.824738 article EN IEEE Transactions on Electron Devices 2000-03-01

Abstract A 64 Kbit non-destructive readout (NDRO) ferroelectric random access memory (FeRAM) using a 0.6-μm technology is described. The NDRO FeRAM uses novel linked cell architecture, which minimizes the circuit overhead accepted in Flash memories. This test device has shown 10-year retention and unlimited read operation. An 120-ns operation performed at voltage of 2.2V. Circuit techniques used include: (1) direct programming capacitors, (2) automatic restoring data, (3) data storing under...

10.1080/10584580108010828 article EN Integrated ferroelectrics 2001-01-01

Lipid bilayer transformations are involved in biological phenomena including cell division, autophagy, virus infection, and vesicle transport. Artificial materials to manipulate membrane dynamics play a vital role cellular engineering drug delivery technology that accesses the membranes of cells or liposomes. Transformation from 3D lipid vesicles 2D nanosheets is thermodynamically prohibited because apolar/polar interfaces between hydrophobic edges water energetically unfavorable. We...

10.1021/acsami.2c17435 article EN ACS Applied Materials & Interfaces 2022-11-28

Abstract High performance LSIs embedded with ferroelectric random access memory (FeRAM) for contactless IC cards are now commercially available. The emphasis is placed on the materials solution SrBi2(Ta,Nb)2O9 (SBTN) which enables to exploit potential of FeRAMs composite logic/microcontroller operating at high speeds and low powers. leading-edge 0.6-μm double-level-metal FeRAM technology produces microcontroller-embedded 14-kbit or 64-kbit FeRAM. A mature 0.8-μm single-level-metal process...

10.1080/10584589908228476 article EN Integrated ferroelectrics 1999-11-01

Effects of surface states on gate-lag phenomena in GaAs MESFETs are studied by 2D simulation. It is shown that the deep-acceptor-like state plays a dominant role determining characteristics. To reduce gate-lag, deep acceptor should be made electron-trap-like. This can realized reducing surface-state density. Some device structures expected to have less also described.

10.1109/gaas.1996.567844 article EN 2002-12-24

In the design of ultralow leakage devices such as image sensors, it is necessary to understand influence low-density defects during plasma processing-plasma-induced physical damage (PPD)-on device performance. Defects created by exposure act carrier conduction sites and induce an increase in (e.g., dark) current. This study proposes a PPD evaluation scheme for defect assessments, specifically lateral direction due stochastic straggling (lateral PPD). Two test structures were designed: single...

10.1109/jeds.2022.3176321 article EN cc-by-nc-nd IEEE Journal of the Electron Devices Society 2022-01-01

Capacitance coupled Bus (CcBus) with Negative Delay Circuit (NDC) architecture for high speed and low power Synchronous DRAMs (SDRAMs) has been developed. Data path consumption is reduced to 1/5 (25mW@200MB/s). Transfer delay time 1/2 (0.8 ns). High band width (10 GB/s) (<500 mW) can be achieved. This 500 mW consumption/package an empirical value maintaining pause in useful range. keep Fill Frequencies (FF) valuable region Gbit-SDRAMs.

10.1109/vlsic.1996.507735 article EN 2002-12-23

Precise control of low-density defect creation during plasma processing is critical for designing ultra-low leakage devices. Unlike conventional vertical mechanisms, the "stochastic lateral straggling" incident particles accepted as inevitable. Herein, a new characterization scheme demonstrated to assess density and profile defects in direction verify their impact using CMOS image sensor-based structures. The junction current (dark current) significantly depended on distance after exposure,...

10.1109/iedm13553.2020.9372074 article EN 2021 IEEE International Electron Devices Meeting (IEDM) 2020-12-12

A nondestructive readout (NDRO) scheme without polarization reversal in a ferroelectric random access memory (FeRAM) has been proposed as solution for extending the number of cycles. However, signal NDRO FeRAM is relatively small compared with those current destructive FeRAMs. As result, accuracy operation selected capacitor sensitive to deformation polarization-voltage (P-V) hysteresis loop, which manifestation imprint phenomena. In order provide reliable by minimizing influence imprint,...

10.1109/imfedk.2004.1566440 article EN 2006-01-05

Gate-lag or slow current transient behaviour in GaAs MESFETs is studied by two-dimensional analysis including surface-state effects. It shown that a recessed-gate structure, the gate-lag reduced to some extent increasing recess depth, but it may not be suppressed as much expected because surface states around gate affect turn-on characteristics. However, introducing buried-gate structure where electrode attached vertical planes of and also same drain electrode, effects are minimized, can...

10.1109/ipfa.1999.791332 article EN 1999-01-01

2003 International Conference on Solid State Devices and Materials,Long-Term Stabilization of Sense Signals in a Non-Destructive Readout FeRAM by Intentional Modification the Polarization Hysteresis Curve for Low Voltage Applications

10.7567/ssdm.2003.b-1-4 article EN Extended Abstracts of the 2020 International Conference on Solid State Devices and Materials 2003-01-01

Currently, silicon-based ultra-large-scale integrated circuits (ULSIs) are widely used in electronic devices. High-performance and high-density ULSIs realized by scaling down the feature sizes of field-effect transistors. To manufacture leading-edge devices, such as three-dimensional (3D) NAND flash memories [1] CMOS image sensors [2] , fabrication technologies with atomic-scale precision, plasma processing, necessary. During undesirable defects created inside materials. Such generally...

10.23919/iwjt52818.2021.9609500 article EN 2021-06-10
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