The present article introduces VLC for automotive applications using an image sensor. In particular, V2I-VLC and V2V-VLC are presented. While previous studies have documented the effectiveness of V2I V2V communication radio technology in terms improving safety, article, we identify characteristics unique to image-sensor-based as compared wave technology. two primary advantages a system its line-of-sight feature sensor that not only provides functions, but also potential vehicle safety made...

This paper introduces an optical vehicle-to-vehicle (V2V) communication system based on wireless technology using LED transmitter and a camera receiver, which employs special CMOS image sensor, i.e, sensor (OCI). The OCI has "communication pixel (CPx)" that can promptly respond to light intensity variations output circuit of "flag image" in only high-intensity sources, such as LEDs, have emerged. these two technologies provides capabilities for 10-Mb/s signal reception real-time detection...

An optical wireless communication (OWC) system based on a light-emitting-diode (LED) transmitter and camera receiver has been developed for use in the automotive area.The OWC will require Mb/s-class data rates ability to quickly detect LEDs from an image.The key achieving this is improvements capabilities of image sensor mounted receiver.In paper, we report novel equipped with (OCI), which newly using CMOS technology.To obtain higher transmission rates, OCI employs specialized Bcommunication...

As a new technology for next-generation vehicle-to-everything (V2X) communication, visible-light communication (VLC) using light-emitting diode (LED) transmitters and camera receivers has been energetically studied. Toward the future in which vehicles are connected anytime anywhere by optical signals, cutting-edge receiver employing special CMOS image sensor, i.e., sensor (OCI), prototyped, an V2V system applying this OCI-based already demonstrated 10-Mb/s signal transmission between real...

This paper presents a new type of CMOS time-of-flight (TOF) range image sensor using single-layer gates on field oxide structure for photo conversion and charge transfer. simple allows the realization dense TOF imaging array with 1515 mum <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> pixels in standard process. Only an additional process step to create n-type buried layer which is necessary high-speed transfer added fabrication The...

A low temporal noise and high dynamic range CMOS image sensor is developed. 1Mpixel with column-parallel folding-integration cyclic ADCs has 80μV <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">rms</sub> (1.2e <sup xmlns:xlink="http://www.w3.org/1999/xlink">-</sup> ) noise, 82 dB using 64 samplings in the ADC mode. Very variable gray-scale resolution of 13b through 19b attained by changing number pixel outputs. The implemented a 0.18-μm...

A wide dynamic range CMOS image sensor with a burst readout multiple exposure method is proposed. In this method, maximally four different exposure-time signals are read out in one frame. To achieve the high-speed readout, compact cyclic analog-to-digital converter (ADC) noise canceling function proposed and arrays of ADCs integrated at column. prototype has been developed 0.25-/spl mu/m 1-poly 4-metal technology. The expanded by factor 1791 compared to case single exposure. measured be 19.8...

This paper presents a high-speed, high-sensitivity 512times512 CMOS image sensor with column parallel cyclic 12-bit ADCs and global electronic shutter. Each pixel has charge amplifier for high charge-to-voltage conversion gain despite of using large-size photodiode, two sample-and-hold stages the shutter fixed pattern noise (FPN) canceling. High-speed column-parallel ADC arrays resolution having small layout size 0.09 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML"...

A high-performance CMOS image sensor (CIS) with 13-b column-parallel single-ended cyclic ADCs is presented. The simplified circuits for the ADC are squeezed into a 5.6-mum-pitch single-side column. proposed internal reference generation and return-to-zero digital signal feedback techniques enhance to have low read noise, high resolution of 13 b, resulting dynamic range 71 dB. An ultralow vertical fixed pattern noise 0.1 e <sub xmlns:mml="http://www.w3.org/1998/Math/MathML"...

A 32*32-bit multiplier using multiple-valued current-mode circuits has been fabricated in 2- mu m CMOS technology. For the based on radix-4 signed-digit number system, two's complement multiplication can be performed with only three-stage full adders a binary-tree addition scheme. The chip contains about 23600 transistors and effective size is 3.2*5.2 mm/sup 2/, which half that of corresponding binary multiplier. multiply time less than 59 ns. performance considered comparable to fastest...

A 33-megapixel 120-frames/s (fps) CMOS image sensor has been developed. The 7808 × 4336 pixel 2.8-μm pitch with 12-bit, column-parallel, two-stage, cyclic analog-to-digital converters (ADCs) and 96 parallel low-voltage differential signaling output ports operates at a data rate of 51.2 Gb/s. pipelined operation the two ADCs reduces conversion time. This ADC architecture also effectively lowers power consumption by exploiting amplifier function ADC. implemented 0.18-μm technology exhibits...

A low temporal read noise and high conversion gain reset-gate-less CMOS image sensor (CIS) has been developed demonstrated for the first time at photoelectron-counting-level imaging. To achieve a pixel without fine or special processes, proposed two unique structures: 1) coupling capacitance between transfer gate floating diffusion (FD) 2) reset FD, removing parasitic capacitances around FD node. As result, CIS with pixels is able to of 220 μV/e <sup...

This paper presents a CMOS image sensor with on-chip compression using an analog two-dimensional discrete cosine transform (2-D DCT) processor and variable quantization level analog-to-digital converter (ADC). The 2-D DCT is essentially suitable for the on-sensor compression, since signal can be directly processed. small low-power nature of design allows us to achieve low-power, low-cost, one-chip digital video cameras. 8/spl times/8-point designed fully differential switched-capacitor...

The temporal read noise on the signal path of a complementary metal-oxide semiconductor image sensor is analyzed to investigate effectiveness high-gain column amplifiers in enhancing sensitivity. examined includes pixel source follower, switched-capacitor, noise-cancelling, amplifier, and sample-and-hold circuit each column. It revealed that total random readout consists component due charge sampled held at summation node amplifier transferred output, direct stage output amplifier. analysis...

This paper presents a CMOS time-of-flight (ToF) range image sensor using high-speed lock-in pixels with background light canceling capability. The proposed pixel uses MOS gate-induced lateral electric field control of depleted potential pinned photodiode for implementing multiple-tap charge modulator while achieving transfer high-time resolution. A TOF 320 x 240 effective is implemented 0.11-μm process. has resolution less than 12 mm without and 20 under line the from 0.8 to 1.8 m...

Ultrasensitive, rapid and selective diagnostic probes are urgently needed to overcome the limitations of traditional for norovirus (NV). Here, we report detection NV genogroup II via nucleic acid hybridization technology using a quantum dot (QD)-conjugated molecular beacon (MB) probe. To boost sensitivity MB assay system, an ultrasensitive QD fluorophore with unique optical properties was synthesized, characterized exploited as fluorescence signal generator. Alloyed thioglycolic (TGA)-capped...

A new indirect time of flight (iToF) sensor realizing long-range measurement 30 m has been demonstrated by a hybrid ToF (hToF) operation, which uses multiple windows (TWs) prepared multi-tap pixels and range-shifted subframes. The VGA-resolution hToF image with 4-tap 1-drain pixels, fabricated the BSI process, can measure depth up to for indoor operation 20 outdoor under high ambient light 100 klux. overlapped TWs between subframes mitigating an issue on motion artifact is implemented. works...

A description is given of a 32*32-bit signed digit multiplier implemented with multiple-valued, bidirectional, current-mode circuits and based on two-microcomputer complementary metal-oxide-semiconductor technology. The can perform 32-bit two's-complement multiplication three-stage SD full adders using binary-tree addition scheme effective size in the chip power dissipation are almost half that corresponding binary CMOS multiplier. multiply time comparable to fastest These results establish...

For low-noise complementary metal-oxide-semiconductor (CMOS) image sensors, the reduction of pixel source follower noises is becoming very important. Column-parallel high-gain readout circuits are useful for CMOS sensors. This paper presents column-parallel signal circuits, correlated multiple sampling (CMS) and their noise effects. In CMS, gain cancelling controlled by number samplings. It has a similar effect to that an amplified CDS thermal but little more effective 1/f RTS noises. Two...

A 1.3-megapixel CMOS image sensor (CIS) with digital correlated double sampling and 17-b column-parallel two-stage folding-integration/cyclic analog-to-digital converters (ADCs) is developed. The has 0.021-e <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">rms</sub> <sup xmlns:xlink="http://www.w3.org/1999/xlink">-</sup> vertical fixed pattern noise, 1.2-e pixel temporal 85.0-dB dynamic range using 32 samplings in the folding-integration ADC...