A5087274166- Radio Frequency Integrated Circuit Design
- Advancements in PLL and VCO Technologies
- Tunneling and Rock Mechanics
- Advanced machining processes and optimization
- Analog and Mixed-Signal Circuit Design
- Photonic and Optical Devices
- Advanced Surface Polishing Techniques
- Microwave Engineering and Waveguides
- Low-power high-performance VLSI design
- Electromagnetic Compatibility and Noise Suppression
- Rock Mechanics and Modeling
- Advanced Machining and Optimization Techniques
- Semiconductor Lasers and Optical Devices
- Drilling and Well Engineering
- Advancements in Semiconductor Devices and Circuit Design
- Advanced Power Amplifier Design
- Advanced Graph Theory Research
- Advanced materials and composites
- Cardiovascular and exercise physiology
- Heart Rate Variability and Autonomic Control
- Engineering Technology and Methodologies
- Graph Labeling and Dimension Problems
- Adhesion, Friction, and Surface Interactions
- Acoustic Wave Resonator Technologies
- Digital Image Processing Techniques
Xidian University
2018-2025
Xuzhou University of Technology
2024
People’s Hospital of Rizhao
2023
Shandong University
2002-2023
Capital University of Physical Education and Sports
2023
Xi'an University of Finance and Economics
2023
Lanzhou Jiaotong University
2022
The design of a Doherty-like power amplifier for millimetre-wave (mm-wave) applications is presented in this work. designed employs novel symmetrical load-modulated balanced (S-LMBA) architecture. This advantageous minimizing the undesired impedance interaction often encountered classic LMBA approach. Such interactions are typically due to use non- <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$50~\Omega...
Low-load blood flow restriction training (BFRT) has been shown to induce a significant increase in muscle activation. However, low-load BFRT augment the post-activation performance enhancement (PAPE) not previously examined. This study aimed examine PAPE of low-intensity semi-squat exercises with varying pressure on vertical height jump performance. Twelve elite athletes from Shaanxi Province women’s football team volunteered participate this for 4 weeks. Participants completed four testing...
This paper presents a low-noise ultra-wideband fractional-N change pump phase-locked loop (CPPLL). By adopting two parallel voltage-controlled oscillators (VCOs) and the synchronized dual-core design, 8.5–17.8-GHz output is covered phase noise reduced by about 3 dB with halving total equivalent inductance of tank. Meanwhile, clock distribution designed to obtain 0.05–8.9-GHz output. using retiming separate division techniques, frequency coupling solved, implementation separated from its...
To eliminate the unexpected spurs introduced by charge pump (CP) mismatch in typical dual-path phase-locked loops (DP-PLLs), a fast calibration method incorporated prototype type-II PLL is presented. By enlarging turn-on time and shrinking charging capacitor, CP can be amplified detected more precisely one reference period. Synchronously, detection-quantization-compensation loop (DQCL) built on original DP-PLL, it facilitates procedure of calibration. monitoring compensating equivalent...
This letter presents a 5-GHz phase-locked loop (PLL) with fast-locking and charge pump (CP) calibration. Based on dual-mode time division multiplexing discriminator-aided phase detector (DAPD), the CP calibration procedure are proposed in compatible efficient manner. The DAPD has coarse-resolution fine-resolution modes, which is used fast locking calibration, respectively. technique incorporated design of PLL. Implemented 0.18-μm 1P6M CMOS process, power dissipation less than 18.3 mW....
This paper presents a broadband RF receiver front-end circuit that offers advantages in both area and power consumption. The design features an innovative dual-path noise-canceling Low-Noise Amplifier (LNA) circuit, achieving impedance matching balun functionality without the need for on-chip inductors. comprises I Q doublebalanced quadrature passive mixers 25% duty-cycle LO generator. circuit's characteristics enable it to operate across wide range of frequency bands. It is implemented...
This paper presents a 7-bit 400-MS/s pipelined successive approximation register (SAR) analog-to-digital converter (ADC) with high reliability. To meet the demand for medium resolution and sampling speed, modified switching scheme is adopted to resolve charge leakage problem improve reliability of SAR ADC. Compared conventional architecture, bootstrapped switch which uses two MOSFETs employed increase uniformity voltage save chip area. In addition, three parallel comparators are controlled...
Frame saw machine is one of tools that used to process dimension stone. The velocity fluctuation traditional feed drive system (FDS) lead excessive wear diamond particles. dynamic performance the FDS has time-varying characteristics during processing stone with a large material removal rate. In this paper, novel was proposed. Firstly, modeling set up on account lumped parameter method (LPM). Then speed new compared FDS. Finally, frequency response were solved by Lagrange and state space...
A 4.1-5-GHz voltage-controlled oscillator (VCO) with phase noise insensitive to equivalent resistance R <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">p</sub> is presented in this letter. self-adjusted current resource (SACR) implemented alleviate the deterioration, while control logic of SACR compatible autofrequency calibration resulting no additional hardware overhead and power. Based on internal resonant cavity increases oscillation...