A Trusted Execution Environment (TEE) sets a platform to secure applications based on the Chain-of-Trust (CoT). The starting point of CoT is called Root-of-Trust (RoT). However, RoT implementation often relies obscurity and provides little flexibility when generating keys system. In this paper, TEE System-on-a-Chip (SoC) architecture proposed heterogeneous design by combining 64-bit Linux-capable processors with 32-bit Micro-Controller Unit (MCU). built cores, while MCU takes care sensitive...

All cryptography systems have a True Random Number Generator (TRNG). In the process of validating, these are necessary for prototyping in Field Programmable Gate Array (FPGA). However, TRNG uses an entropy source based on non-deterministic effects challenging to replicate FPGA. This work shows problems and solutions implement frequency collapse multimodal Ring Oscillators (RO). The implemented FPGA pass all SP800-90B tests from National Institute Standards Technology (NIST) with good...

The IoT applications use embedded processors to execute lightweight tasks for sensing and management of communications, using different energy harvesting strategies. However, many need a low-power consumption the limitation power supplies. This paper presents low-area System On Chip (SoC) with stable supply. SoC consists microprocessor, 1-KB Static Random Access Memory (SRAM), debug module, timer, General-Purpose In-Outs (GPIO), Serial Peripheral Interface (SPI) programmer. processor uses...

Internet-of-things networks consist of multiple sensor devices spread over a wide area. In order to protect the data from unauthorized access and tampering, it is essential ensure secure communication between central server. This security measure aims guarantee authenticity, confidentiality, integrity. Unlike traditional computing systems, node are often limited regarding memory power. Lightweight protocols, such as LoRaWAN, were introduced overcome these limitations. However, despite...

Wireless sensor network (WSN) has emerged as a significant application among Internet-of-Things (IoT) applications. Energy harvesting systems have high potential for deployment in WSN to monitor natural environments and industrial equipment. With limited resources, including power chip area, an energy system demands thorough resource allocation several circuits like control system, sensors, transceiver. Also, such are required function with low-peak adapt the fluctuation of harvested energy....

This work presents a 32-bit Reduced Instruction Set Computer fifth-generation (RISC-V) microprocessor with COordinate Rotation DIgital (CORDIC) accelerator. The accelerator is implemented inside the core and being used by software via custom instruction. VexRiscv Architecture (ISA) of RV32IM; that means RISC-V including Integer Multiplication. experimental results were collected using Field-Programmable Gate Array (FPGA) on DE2-115 development kit Application Specific Integrated Chip (ASIC)...

In this paper, a 32-bit RISC-V microcontroller in 65-nm Silicon-On-Thin-BOX (SOTB) chip is presented. The system developed based on the VexRiscv Central Processing Unit (CPU) with Instruction Set Architecture (ISA) extensions of RV32IM. Besides core processor, System-on-Chip (SoC) contains 8KB boot ROM, 64KB on-chip memory, UART controller, SPI timer, and GPIOs for LEDs switches. ROM has 7KB hard-code combinational logics 1KB stack SRAM. proposed SoC performs Dhrystone Coremark benchmarks...

The Internet-of-Things applications use embedded processors to execute lightweight tasks for sensing and management of communications. These different energy reducing strategies such as clock gating domain switching. However, some power supplies sensor systems are designed low-power delivery rather than low-energy battery consumption. Regarding consumption, it is important choose the system-based processor in which variables taken into account. Depending on final IoT application, area,...

A GaAs, single-chip, 32-bit RISC (reduced-instruction-set computer) microprocessor has been fabricated and tested fully functional. An instruction execution cycle time of 16.5 ns measured giving an operation rate 60 MIPS (million instructions per second). Power dissipation is 4.7 W. The design based on GaAs enhancement JFET direct-coupled FET logic (DCFL). Some the unique features chip include a precharged data bus for fast interregister transfers, dual port register file memory using...

For most Internet-of-Things (IoT) applications, embedded processors typically execute lightweight tasks such as sensing and communication. The typical IoT program senses some information sends them via a channel, usually wireless channel with an RF circuit. These nodes often require system networking capabilities low-power harvester implementation. This brief presents sub- μW 8-bit processor which is suitable for applications. implements the Open8 Instruction Set Architecture (ISA) datapath...

The Trusted Execution Environment (TEE) is designed to establish a safe environment that prevents the execution of unauthenticated programs. nature TEE continuous verification process with hashing, signing, and verifying. Such called Chain-of-Trust, derived from Root-of-Trust (RoT). Typically, RoT pre-programmed, hard-coded, or embedded in hardware, which locally produced checked before booting. employs various cryptographic processes throughout boot verify authenticity bootloader. It also...

This poster presents a 32-bit Reduced Instruction Set Computer five (RISC-V) microprocessor with COordinate Rotation DIgital (CORDIC) algorithm accelerator. The implemented core processor is the VexRiscv CPU, an RV32IM variant of RISC-V ISA processor. Within core, CORDIC accelerator was connected directly to Execute stage. placed in Briey System-on-Chip (SoC) and synthesized on Field Programmable Gate Array (FPGA) Application Specific Integrated Chip (ASIC) level cell logic ROHM- 180nm technology

This poster presents a Trusted Execution Environment (TEE) hardware implementation based on heterogeneous architecture. The TEE verifies the integrity of software applications chain trust with initial authentication. chain-of-trust is implemented in software, using crypto-processors. authentication called Root-of-Trust (RoT), and isolated 32-bit system handles it. On peripheral bus, there are several cryptography accelerators such as SHA- 3, ED25519, AES, True Random Number Generator (TRNG)....

In an Internet of Things (IoT) system, many embedded devices are deployed to gather massive amounts information. These may collect indexes natural substances (air, soil, water) or physiological parameters provide data for later assessment on environmental conditions improving healthcare. Gathering this information requires processors execute lightweight tasks involving sensing and communication through a wireless channel. This paper presents low-area System Chip (SoC) capable performing IoT...

Deep Learning (DL) training process involves intensive computations that require a large number of memory accesses. There are many surveys on behaviors with the DL training. They use well-known profiling tools or improving existing to monitor processes. This paper presents new approach profile using co-operate solution from software and hardware. The idea is Field-Programmable-Gate-Array as main for processes computer. Then, both hardware point-of-views can be monitored evaluated. most...