A5068137073- Nanowire Synthesis and Applications
- Semiconductor materials and devices
- Silicon Nanostructures and Photoluminescence
- Semiconductor materials and interfaces
- Advancements in Semiconductor Devices and Circuit Design
- Silicon and Solar Cell Technologies
- solar cell performance optimization
- Thin-Film Transistor Technologies
- Semiconductor Quantum Structures and Devices
- Photonic and Optical Devices
- Cultural Industries and Urban Development
- Fashion and Cultural Textiles
- Silicon Carbide Semiconductor Technologies
- Diverse academic and cultural studies
- Sensor Technology and Measurement Systems
Umicore (Belgium)
2017-2023
IMEC
2012-2014
KU Leuven
2012-2013
The Porous germanium Efficient Epitaxial LayEr Release (PEELER) process is introduced allowing the fabrication of wafer scale detachable monocrystalline Ge nanomembranes compatible with III–V material growth on porous and substrate reuse.
Abstract Germanium is listed as a critical raw material, and for environmental economic sustainability reasons, strategies lower consumption must be implemented. A promising approach Ge lift‐off concepts, which enable to re‐use the substrate multiple times. Our concept based on Ge‐on‐Nothing that controlled restructuring at high temperature of macroporous surface, forming foil weakly attached its parent wafer. Its suitability III–V epitaxy seed support has previously been demonstrated with...
To support the feasibility of an all-Si tandem solar cell based on quantum confined Si nanowires, we investigate diameter reduction nanowires by thermal oxidation. As a starting point, 6 × mm2 arrays vertical with 90-nm pitch were made DUV lithography and anisotropic reactive ion etching. These are subsequently oxidized at temperatures ranging from 825°C to 1150°C. The lower temperature oxidation results in retarded kinetics, as expected. An unexpected gradual necking undercutting is however...
Free-standing semiconductor nanowires on bulk substrates are increasingly being explored as building blocks for novel optoelectronic devices such tandem solar cells. Although carrier transport properties, mobility and trap densities, essential applications, it has remained challenging to quantify these properties. Here, we report a method that permits the direct, contact-free quantification of nanowire diffusivity densities in thin (∼25 nm wide) silicon nanowires-without any additional...
For future 4-junction Ge based multi-junction solar cells, the current generated in sub-cell gets very important. We developed an efficient rear-side passivation stack, which results minority carrier lifetimes (τ <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">eff</sub> ) ≈ 200 μs and investigated its performance accelerated aging experiment (1 MeV electron irradiation). The caused a strong lifetime decrease down to T = 4 μs, whereas mobility...
Silicon nanowires (SNWs) have recently attracted a lot of interest due to its explosive potential for nanoelectronic applications. To materialize these applications, the key role thermal oxidation behavior SNWs must be thoroughly understood. In first half paper we review results on SNW published up date. It is commonly observed that shows retarded rate and stronger temperature dependence compared those planar Si; in addition, oxide thickness also strong function diameter. second half, report...
Low temperature electron spin resonance studies have been carried out on single crystalline arrays of sub-10 nm Si nanowires (NWs) manufactured (100)Si by top down etching and oxidation thinning. This reveals the presence a substantial inherent density Pb0 (Si3 ≡ Si•) defects (traps) at NW Si/SiO2 interfaces, due to particular faceting enhanced interface strain, leaving interfaces reduced electrical quality. Perusal specific properties occurring Pb-type defect system points nanopillar...
Umicore has been the leading Germanium substrate manufacturer over last 20 years. We are only able to maintain that position by constantly improving quality of our product. In this work, wants present how it will continue tradition adding even more value its
Specific power is an important metric for solar arrays in the aerospace market. For High Altitude Pseudo Satellites (HAPS), cells specific powers above 1500 W/kg are targeted. The current standard technology space applications, namely lattice matched triple junction grown on 145 μm thick germanium substrates, supplies required efficiency but not light enough. This paper will present Ge-on-Ge engineered substrate concept as approach that can be implemented to address needed reduction...
Electron spin resonance studies have been performed on arrays of single-crystalline Si nanowires (NWs), 375 nm long and top diameter about 5 nm, fabricated (100)Si by top-down etching final thinning thermal oxidation in dry O2/N2 at . The SiO2/SiNW interfaces, showing a density inherent electrically detrimental defects substantially exceeding that standard technological (100)Si/SiO2, are inferior electrical quality. An extensive study the passivation kinetics H2 forming gas ambient reveals...
New developments for space solar cells mainly address efficiency improvements and weight reduction. In this paper we developed amorphous SiC based layer stacks passivation enhanced reflection on thin lowly doped (2×10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">16</sup> - 1×10 xmlns:xlink="http://www.w3.org/1999/xlink">17</sup> at/cm xmlns:xlink="http://www.w3.org/1999/xlink">3</sup> ) Ge wafers. Passivated samples with minority carrier...
The Umicore Ge-on-Ge engineered substrate concept consists of a thin epi-ready germanium foil that is weakly attached to bulk mother substrate. weak layer made through modification the front side and allows for easy detachment at any point in solar cell manufacturing flow. intended be re-used multiple times. This paper will present growth characterization III-V layers on substrates as well subsequent GaInP single junction device fabrication characterization. Voc cells was unaffected, which...
Germanium, a critical raw material, is used as template for III-V epitaxial growth and bottom cell in multi-junction solar cells. To reduce the amount of germanium used, detachable substrate very interesting, especially if Ge foil thickness can be adjusted needed. In this study, potential GeCl <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">4</inf> -based epitaxy was demonstrated. A rate up to 190 nm/min <tex...
Extensive low-temperature ( T ) electron spin resonance studies (ESR) have been carried out on as-fabricated, vacuum annealed, and irradiated single crystalline arrays of Si nanowires (NWs) with a top diameter 5 nm produced by down etching into (100)Si, finally thinned high- oxidation. This reveals the presence substantial inherent density P b0 (Si 3 ≡Si • interface defects (charge trapping recombination centers) quite above standard thermal values, leaving NW-Si/SiO 2 interfaces reduced...
Germanium (Ge) is increasingly used as a substrate for high-performance optoelectronic, photovoltaic, and electronic devices. These devices are usually grown on thick rigid Ge substrates manufactured by classical wafering techniques. Nanomembranes (NMs) provide an alternative to this approach while offering wafer-scale lateral dimensions, weight reduction, limitation of waste, cost effectiveness. Herein, we introduce the Porous germanium Efficient Epitaxial LayEr Release (PEELER) process,...