S. Subramanian

ORCID: 0000-0003-0096-5737
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About
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Research Areas
  • Electron Spin Resonance Studies
  • Semiconductor materials and devices
  • Advancements in Semiconductor Devices and Circuit Design
  • Solid-state spectroscopy and crystallography
  • Magnetism in coordination complexes
  • Nuclear Physics and Applications
  • Integrated Circuits and Semiconductor Failure Analysis
  • Photochemistry and Electron Transfer Studies
  • Chemical Synthesis and Characterization
  • Inorganic Fluorides and Related Compounds
  • Extraction and Separation Processes
  • Mass Spectrometry Techniques and Applications
  • Radioactive element chemistry and processing
  • Ferroelectric and Negative Capacitance Devices
  • Smart Grid Energy Management
  • Hybrid Renewable Energy Systems
  • Molecular spectroscopy and chirality
  • 3D IC and TSV technologies
  • Lanthanide and Transition Metal Complexes
  • Microgrid Control and Optimization
  • Copper Interconnects and Reliability
  • Cerebrovascular and genetic disorders
  • Radioactivity and Radon Measurements
  • Semiconductor Quantum Structures and Devices
  • bioluminescence and chemiluminescence research

IMEC
2020-2025

The Ohio State University
2016

Medical College of Wisconsin
2015

National University of Singapore
2012

Cliniques Universitaires Saint-Luc
2010

KU Leuven
1966-2010

Semmelweis University
2010

Delft University of Technology
1993-1994

Royal Military College Saint-Jean
1984-1992

Concordia University
1982-1989

We report the first monolithic integration of 3D Complementary Field Effect Transistor (CFET) on 300mm wafers using imec's N14 platform. A CFET process is cost effective compared to a sequential process. The small N/P separation in results lower parasitics and higher performance gains. In this paper, fabrication flow, we demonstrate functional PMOS FinFET bottom devices NMOS nanosheet FET top devices. Process development all critical modules enable these are presented. Monolithic scheme...

10.1109/vlsitechnology18217.2020.9265073 article EN 2020-06-01

We report on Si nanosheet monolithic Complementary Field-Effect Transistors (CFETs) at industry-relevant 48nm gate pitch, with source-drains (SDs) and SD contacts formed for either bottom or top devices. epi patterning 30nm vertical N-P space high-aspect-ratio contact formation are successfully demonstrated. Functional devices excellent subthreshold slope $(SS_{SAT}=7075$ mV/dec) reported devices, both N- PMOS. Middle dielectric isolation (MDI) by SiGe replacement processing is introduced as...

10.23919/vlsitechnologyandcir57934.2023.10185218 article EN 2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits) 2023-06-11

The specific problem of the determination parameter errors in a rigorous least-squares fitting procedure used for estimating spin-Hamiltonian parameters from EPR data is explicitly considered. Details computer required to accomplish this are given. method illustrated using single-crystal sample copper chloride triazole (C2N3H3.CuCl2).

10.1088/0022-3719/15/35/017 article EN Journal of Physics C Solid State Physics 1982-12-20

Single crystal E.P.R. spectra of Cr(III) doped in hexaimidazole zinc(II) dichloride tetrahydrate show the presence a number chemically and magnetically distinct sites with large zero-field splittings considerable forbidden transitions at X-band frequencies. The Q-band have been analysed. seems to depend on concentration chromium. tensors for two prominent are (a) D = 1825·1, E -574·3; (b) 1821·3, -388·2 (all units 10-4 cm-1). unique axis D-tensor both correspond nearest neighbour Zn-Zn...

10.1080/00268978000100801 article EN Molecular Physics 1980-03-01

Buried power rail (BPR) is a key scaling booster for CMOS extension beyond the 5 nm node. This paper demonstrates, first time, integration of tungsten (W) BPR lines with Si finFETs. The characteristics in close proximity to floating are found be similar without BPR. Moreover, W-BPR interface Ru via contact can withstand more than 320 h electromigration (EM) stress at 4 MA/cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> and 330°C,...

10.1109/vlsitechnology18217.2020.9265113 article EN 2020-06-01

This paper presents extensive research on improving the power conversion efficiency of five-level multilevel inverters (MLIs) by utilizing a reduced switch topology. MLIs have received an abundance focus because their ability to generate high-quality output waveforms and better harmonic outcomes than traditional two-level inverters. The high number switches in MLIs, other hand, can result increased losses lower overall efficiency. In this paper, novel topology for which is having five...

10.11591/eei.v13i3.6884 article EN Bulletin of Electrical Engineering and Informatics 2024-04-05

Nanosheet device is being introduced in the industry as post-FinFET CMOS architecture thanks to its wider transistor effective width/footprint by stacked nanosheet channels. scaling will continue combining slow pitch/track and evolutions, such Forksheet CFET. Backside power delivery combined with architectures expected provide smaller IR drop better scalability. It can be extended functional backside, which contains variety of components at backside for further system-on-chip...

10.1109/vlsitsa60681.2024.10546439 article EN 2024-04-22

LBA5506 Background: Zalutumumab is a novel, fully human IgG1 mAb targeting the EGFr that has shown encouraging activity in SCCHN. Methods: Patients with noncurable SCCHN an ECOG PS of 0-2 and centrally documented radiographic progressive disease (PD) within 6 months after platinum-therapy were randomized between zalutumumab monotherapy best supportive care (BSC) 2:1 ratio. Stratification parameter was PS. Methotrexate (MTX) allowed BSC arm only. Individual dose-titration applied (max....

10.1200/jco.2010.28.18_suppl.lba5506 article EN Journal of Clinical Oncology 2010-06-20

γ-Radiolysis of frozen trimethyl phosphate at 77°K, gave methyl and H2COP(O)(OMe)2 radicals. The radical was lost ca. 120°K, the e.s.r. spectrum more stable this temperature characteristic a system in which α-hydrogen atoms were rapidly reorienting.

10.1039/j19700001334 article EN Journal of the Chemical Society A Inorganic Physical Theoretical 1970-01-01

In this work, a 14-nm-node Replacement Metal Gate (RMG or "Gate Last") high-k Last FinFET flow, compatible with the high thermal budget required during DRAM fabrication process is demonstrated for first time, proven functionality of SRAM and Ring Oscillators. An extensive analysis conducted assessment optimization nMOS gate stack. A thermally stable stack featuring Lanthanum (La)-dipole TiN/TiAl/TiN Work Function Metals (WFMs) proposed to achieve sub 0.2 V threshold voltage $(V_{t})$.

10.1109/iedm45625.2022.10019422 article EN 2022 International Electron Devices Meeting (IEDM) 2022-12-03

10.1007/bf02164786 article EN Journal of Radioanalytical and Nuclear Chemistry 1986-02-01

An ESR study of single crystals KAsF6, γ irradiated and observed at 77°K, has been made. A three-fluorine center similar to the Vt center, F32−, identified, principal components directions for g tensor, fluorine hyperfine interaction tensors, have obtained. The is nonlinear with bond angle F–F–F = 150° ± 3°, odd-electron density being larger on central atom smaller two equivalent end atoms radical. INDO calculations suggest that it a σ-type radical unpaired spin distributed in orbitals lying...

10.1063/1.1679619 article EN The Journal of Chemical Physics 1973-04-01

Single crystal EPR of Ni(en)2+3 (en=ethylenediamine) doped in Zn(en)3(NO3)2 is reported. Our results beased on exact diagonalization procedure indicate that the units undergo distortion along threefold axis which coincides with crystallographic c axis. The zero field tensor found to be axially symmetric D being 0.831±0.006 cm−1. utility S=1 ions obtaining information regarding molecular distortions also evidenced.

10.1063/1.454621 article EN The Journal of Chemical Physics 1988-01-01

We report for the first time on a thermally stable High-k/Metal Gate (HKMG) low cost CMOS FinFET solution DRAM peripheral applications, integrated with Si:P and Si <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0.55</inf> Ge xmlns:xlink="http://www.w3.org/1999/xlink">0.45</inf> :B embedded Source/Drain (S/D). The baseline is fully compatible constraints (e.g. higher thermal budget linked to co-integration cells), exhibits improved I...

10.1109/vlsitechnologyandcir46769.2022.9830186 article EN 2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits) 2022-06-12
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