L. Bourdet
A5031251015- Advancements in Semiconductor Devices and Circuit Design
- Quantum and electron transport phenomena
- Semiconductor materials and devices
- Quantum Computing Algorithms and Architecture
- Topological Materials and Phenomena
- Semiconductor Quantum Structures and Devices
- Quantum Information and Cryptography
- Silicon Carbide Semiconductor Technologies
- Physics of Superconductivity and Magnetism
- Nanowire Synthesis and Applications
- Advanced Semiconductor Detectors and Materials
- Ferroelectric and Negative Capacitance Devices
- earthquake and tectonic studies
- Seismic Imaging and Inversion Techniques
- 2D Materials and Applications
- Cold Atom Physics and Bose-Einstein Condensates
- Photonic and Optical Devices
- Electronic and Structural Properties of Oxides
- Quantum-Dot Cellular Automata
- Methane Hydrates and Related Phenomena
Microsoft (United States)
2023-2025
Delft University of Technology
2021
QuTech
2021
CEA Grenoble
2016-2019
Commissariat à l'Énergie Atomique et aux Énergies Alternatives
2016-2019
Institut Nanosciences et Cryogénie
2016-2018
Université Grenoble Alpes
2016-2018
University of Bristol
2018
University of Cambridge
2018
Instituto de Ciencia de Materiales de Madrid
2018
Topological phases of matter can enable highly stable qubits with small footprints, fast gate times, and digital control. These hardware-protected must be fabricated a material combination in which topological phase reliably induced. The challenge: disorder destroy the obscure its detection. This paper reports on devices low enough to pass gap protocol, thereby demonstrating gapped superconductivity paving way for new qubit.
In a semiconductor spin qubit with sizable spin-orbit coupling, coherent rotations can be driven by resonant gate-voltage modulation. Recently, we have exploited this opportunity in the experimental demonstration of hole silicon device. Here investigate underlying physical mechanisms measuring full angular dependence Rabi frequency, as well and anisotropy g factor. We show that g-matrix formalism simultaneously capture discriminate contributions two so far independently discussed literature:...
The ability to manipulate electron spins with voltage-dependent electric fields is key the operation of quantum spintronics devices, such as spin-based semiconductor qubits. A natural approach electrical spin control exploits spin-orbit coupling (SOC) inherently present in all materials. So far, this could not be applied electrons silicon, due their extremely weak SOC. Here we report an experimental realization electrically driven electron-spin resonance a silicon-on-insulator (SOI) nanowire...
We discuss the modeling of electrical manipulation spin qubits in linear-response regime where Rabi frequency is proportional to magnetic field and radio-frequency electric excitation. show that can be obtained from a generalized $g$-tensor resonance formula featuring $g$ matrix its derivative ${g}^{\ensuremath{'}}$ with respect (or gate voltage) as inputs. These matrices easily calculated wave functions qubit at zero field. The $g$-matrix formalism therefore provides complete dependence...
We describe a concrete device roadmap towards fault-tolerant quantum computing architecture based on noise-resilient, topologically protected Majorana-based qubits. Our encompasses four generations of devices: single-qubit that enables measurement-based qubit benchmarking protocol; two-qubit uses braiding to perform Clifford operations; an eight-qubit can be used show improvement operation when performed logical qubits rather than directly physical qubits; and topological array supporting...
We present recent progress towards the implementation of a scalable quantum processor based on fully-depleted silicon-on-insulator (FDSOI) technology. In particular, we discuss an approach where elementary bits information - so-called qubits are encoded in spin degree freedom gate-confined holes p-type devices. show how hole-spin can be efficiently manipulated by means microwave excitation applied to corresponding confining gate. The hole state read out and reinitialized through Pauli...
Silicon qubits can show a strong interplay between spin and valley physics. The is much more robust to decoherence than the degree of freedom, but difficult address electrically. Here, authors via atomistic simulations that qubit be continuously transformed into for manipulation, then brought back regime benefit from longer lifetimes. This transformation relies on intrinsic spin-orbit coupling suitable engineering electric field in device. opens up new possibilities design electrically...
We perform an excited state spectroscopy analysis of a silicon corner dot in nanowire field-effect transistor to assess the electric field tunability valley splitting. First, we demonstrate back-gate-controlled transition between single quantum and double parallel that allows tuning device formation. find linear dependence splitting on back-gate voltage, from $880~\mu \text{eV}$ $610~\mu with slope $-45\pm 3~\mu \text{eV/V}$ (or equivalently $-48\pm \text{eV/(MV/m)}$ respect effective...
Abstract Semiconducting–superconducting hybrids are vital components for the realization of high‐performance nanoscale devices. In particular, semiconducting–superconducting nanowires attract widespread interest owing to possible presence non‐abelian Majorana zero modes, which quasiparticles that hold promise topological quantum computing. However, systematic search Majoranas signatures is challenging because it requires reproducible hybrid devices and reliable fabrication methods. This work...
We compute the contact resistances $R_{\rm c}$ in trigate and FinFET devices with widths heights 4 to 24 nm range using a Non-Equilibrium Green's Functions approach. Electron-phonon, surface roughness Coulomb scattering are taken into account. show that represents significant part of total resistance sub-30 gate lengths. The analysis quasi-Fermi level profile reveals spacers between heavily doped source/drain major contributors resistance. conductance is indeed limited by poor electrostatic...
We fabricated Quantum Dot (QD) devices using a standard SOI CMOS process flow, and demonstrated that the spin of confined electrons could be controlled via local electrical-field excitation, owing to inter-valley spin-orbit coupling. discuss modulating confinement geometry an additional electrode may enable switching quantum bit (qubit) between electrically-addressable valley configuration protected configuration. This proposed scheme bears relevance improve trade-off fast operations slow...
HAL is a multi-disciplinary open access archive for the deposit and dissemination of scientific research documents, whether they are published or not.The documents may come from teaching institutions in France abroad, public private centers.L'archive ouverte pluridisciplinaire HAL, est destinée au dépôt et à la diffusion de scientifiques niveau recherche, publiés ou non, émanant des établissements d'enseignement recherche français étrangers, laboratoires publics privés. Si MOS technology...
We report the efforts and challenges dedicated towards building a scalable quantum computer based on Si spin qubits. review advantages of relying devices fabricated in thin film technology as their properties can be situ tuned by back gate voltage, which prefigures tuning capabilities qubits architectures.
We report on the hole compact double quantum dots fabricated using a conventional CMOS technology. provide evidence of Pauli spin blockade in few regime that is relevant to qubit implementations. A current dip observed around zero magnetic field, agreement with expected behavior for case strong spin-orbit. deduce an intradot relaxation rate ≈120 kHz first holes, important step towards robust spin-orbit qubit.
The fusion of non-Abelian anyons or topological defects is a fundamental operation in measurement-only quantum computation. In superconductors, this amounts to determination the shared fermion parity Majorana zero modes. As step towards this, we implement single-shot interferometric measurement indium arsenide-aluminum heterostructures with gate-defined nanowire. interferometer formed by tunnel-coupling proximitized nanowire dots. causes state-dependent shift these dots' capacitance up 1 fF....
We present measurements and simulations of semiconductor-superconductor heterostructure devices that are consistent with the observation topological superconductivity Majorana zero modes. The fabricated from high-mobility two-dimensional electron gases in which quasi-one-dimensional wires defined by electrostatic gates. These enable local non-local transport properties have been optimized via extensive to ensure robustness against non-uniformity disorder. Our main result is several devices,...
GAA nanowires (NW) transistors are promising candidates for sub 10 nm technology nodes. They offer optimal electrostatic control, thereby enabling ultimate CMOS device scaling. Horizontally stacked they a natural extension of today's mainstream technology. Considering enlarged NWs in Nanosheets (NS) allows to target the best compromise power and performance future applications. In this paper we will first briefly introduce then review what can bring advanced simulation focusing on both...
Qubits can be made out of a variety experimental platforms, fig. 1. Small processors have already been demonstrated in trapped ions and superconductors but both cases, the constraints for coherent manipulation effective large size qubits including all quantum functionalities are hardly compatible with very large-scale architecture. When it comes to crucial issue integration, Si spin well positioned due their long coherence times compatibility semiconductor fabrication techniques. Indeed,...
We successfully demonstrated experimentally the electrical-field-mediated control of spin electrons confined in an SOI Quantum Dot (QD) device fabricated with a standard CMOS process flow. Furthermore, we show that Back-Gate devices enables switching quantum bit (qubit) between electrically-addressable, yet charge noise-sensitive configuration, and protected configuration.
We report the efforts, challenges and perspectives dedicated towards building a reliable spin read-out for Si qubit systems. review several strategies that are pursued in semiconductor quantum circuit community. discuss their pros cons with respect to performance (speed fidelity), integration potential footprint. then address envisioned architecture qubits at large scale.
Quantum computing (QC) is expected to extend the high performance roadmap [1]-[2] at condition be able run a large number of errorless quantum operations, typically. over billion. It out reach in actual physical systems because decoherence. As consequence, error correction techniques, which utilize idea redundant encoding, have been introduced cure for errors [3]-[5]. In state-of-the-art codes, with thresholds or fidelities around 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML"...
We present some recent progress towards the implementation of semiconductor spin quantum bits derived from a Si CMOS technology platform. Our approach consists in developing foundry-compatible embodiment basic building block information, with strong potential for large scale co-integration core its mandatory classical control and readout electronics. After introducing various qubit manipulation, coupling schemes, we discuss prospects scalability, particular advantages FDSOI technology.
We fabricated and in-depth characterized advanced planar nanowire CMOS devices, strained by the substrate (sSOI or SiGe channel) process (CESL, source/drain). have built a novel access resistance (R <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">ACC</sub> ) extraction procedure, which enables us to clearly evidence strong impact of back-bias strain on R xmlns:xlink="http://www.w3.org/1999/xlink">acc</sub> (-21% for 4 V...