X. Li

ORCID: 0009-0000-5144-1808
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About
Contact & Profiles
Research Areas
  • Semiconductor materials and devices
  • Advancements in Semiconductor Devices and Circuit Design
  • Integrated Circuits and Semiconductor Failure Analysis
  • Advanced Memory and Neural Computing
  • Ferroelectric and Negative Capacitance Devices
  • Electronic and Structural Properties of Oxides
  • Nanowire Synthesis and Applications
  • Analytical Chemistry and Sensors
  • Quantum and electron transport phenomena
  • ZnO doping and properties
  • Semiconductor materials and interfaces
  • Innovative concrete reinforcement materials
  • Concrete and Cement Materials Research
  • Advanced Biosensing Techniques and Applications
  • Silicon Carbide Semiconductor Technologies
  • Structural Behavior of Reinforced Concrete
  • Molecular Junctions and Nanostructures
  • Neuroscience and Neural Engineering

Technology Centre Prague
2015

Advanced Materials Technology (United States)
2015

Agency for Science, Technology and Research
2008-2013

Singapore Science Park
2010-2012

Institute of Microelectronics
2008-2012

Nanyang Technological University
2007-2011

We report, for the first time, three types of endurance failure behaviors in TMO based RRAM. New physical mechanisms are proposed to clarify origins these failures. A physically-based optimized switching mode is developed improve TMO-RRAM. significantly enhanced >;10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">9</sup> cycles was demonstrated HfO <sub xmlns:xlink="http://www.w3.org/1999/xlink">x</sub> /TiO /HfO devices.

10.1109/iedm.2011.6131539 article EN International Electron Devices Meeting 2011-12-01

For the first time, nano-meter-scaled 1T-1R non-volatile memory (NVM) architecture comprising of RRAM cells built on vertical GAA nano-pillar transistors, either junction-less or junction-based, is systematically investigated. Transistors are fabricated using fully CMOS compatible technology and stacked onto tip nano-pillars (with a diameter down to ~37nm) achieve compact 4F <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> footprint. In...

10.1109/iedm.2012.6479082 article EN International Electron Devices Meeting 2012-12-01

Purpose The purpose of this paper is to propose a novel and general detection framework called Prior-Det, which combined with prior knowledge for solar cells based on transformer, aiming at the problem accuracy reducing false positive rate. Design/methodology/approach image features introduced position preprocess, combining module (KCM) designed acquire presegmented features. And Swin Transformer-based model as vision backbone use Mask R-CNN used defect cells, thus it could benefit from...

10.1108/ria-10-2024-0230 article EN Robotic Intelligence and Automation 2025-03-31

This paper reviews the progress of vertical top-down nanowire technology platform developed to explore novel device architectures and integration schemes for green electronics clean energy applications. Under domain, besides having ultimate scaling potential, wire offers (1) CMOS circuits with much smaller foot print as compared planar transistor at same node, (2) a natural tunneling FETs, (3) route fabricate stacked nonvolatile memory cells. harvesting area, wires could provide cost...

10.1155/2012/492121 article EN cc-by Journal of Nanotechnology 2011-08-04

In this brief, low-frequency noise (LFN) characteristics are studied in oxide-based (TiN/HfO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">x</sub> /Pt) resistive random access nemory cells having different dimensions. It is confirmed that, for the low resistance state (LRS), current conduction localized without an area dependence, whereas high state, it a uniform leakage throughout whole device area. An LFN model proposed filamentary LRS based...

10.1109/ted.2011.2178245 article EN IEEE Transactions on Electron Devices 2012-01-09

A fully CMOS-compatible vertical nanopillar gate-all-around transistor integrated with a transition-oxide-based resistive random access memory cell to realize 4 <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">F</i> <sup xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> footprint has been demonstrated and systematically characterized. The exhibits excellent transfer characteristics diameter scaled down few tens of nanometer. Three types switching...

10.1109/ted.2013.2240389 article EN IEEE Transactions on Electron Devices 2013-02-04

Using scanning transmission electron microscope with high resolution energy loss spectroscopy, the chemical nature of percolation path formed in ultrathin SiON layers is studied for digital and analog breakdown (BD). Our results show that diameter dilates from 30 nm to 55 as gate leakage current increases 2 muA 40 muA. Oxygen deficiency radially distributed BD center its surrounding areas. The composition changes SiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML"...

10.1109/iedm.2008.4796813 article EN 2008-12-01

The spatial distribution of chemical elements is studied in high-κ, metal-gated stacks applied field effect transistors. Using the transmission electron microscope (TEM)-based analytical techniques energy-loss spectroscopy (EELS) and energy-dispersive x-ray spectroscopy, it demonstrated that Al2O3 La2O3 capping layers show distinctly different diffusion profiles. importance EELS collection angle discussed. Popular models assume La-rich interface are rejected.

10.1063/1.3478446 article EN Applied Physics Letters 2010-09-06

For NiSi FUSI gate transistors, switching behaviors have been observed after breakdown (BD) under certain favorable conditions. The conductive BD path can be ¿switched-off¿ if a reverse bias, as opposed to the stressing voltage, is applied, condition required for observing SET and RESET conduction in material systems. Using percolation model of dielectric systems, we explain this behavior result passivation oxygen-deficient path. First ionized oxygen atoms are removed from upon BD, driven by...

10.1109/iedm.2009.5424402 article EN 2021 IEEE International Electron Devices Meeting (IEDM) 2009-12-01

Reliability study of high-κ (HK) gate dielectric based transistors has become imperative for the current and future CMOS technology nodes as industry shifts towards replacement conventional silicon oxynitride (SiON) with hafnium-based oxides. One key requirements any oxide reliability is a quantitative assessment time dependent breakdown (TDDB) lifetime using suitable statistical models. Direct extension simple model used SiON to HK complicated by presence interfacial sub-oxide layer (IL,...

10.1109/irps.2010.5488735 article EN 2010-01-01

1/ <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">f</i> -like noise measurements of gate leakage current (Ig) at the different stages progressive breakdown (BD) confirm that a percolation path in ultrathin dielectrics could grow from an unstable physical structure digital BD into stable analog BD. A model involving E'-centers and neutral oxygen vacancies is developed to explain fluctuation digital-to-analog transformation I <sub...

10.1109/iedm.2007.4418983 article EN 2007-01-01

In order to achieve aggressive scaling of the equivalent oxide thickness (EOT) and simultaneously reduce leakage currents in logic devices, silicon-based oxides (SiON / SiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> ) have been replaced by physically thicker high-κ transition metal thin films many manufacturers starting from 45 nm technology node. CMOS process compatibility, integration reliability are key issues address while...

10.1109/irps.2010.5488805 article EN 2010-01-01

Bias temperature instability of TiN/HfO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">x</sub> /Pt resistive random access memory (ReRAM) device is investigated in this work for the first time. As increases (up to 100°C work), it observed that: (1) leakage current at high resistance state (HRS) increases, which can be explained by higher density traps inside dielectrics (related trap-assistant tunneling), leading a lower On/Off ratio; (2) set...

10.1109/irps.2010.5488697 article EN 2010-01-01

Dielectric breakdown in advanced gate stacks state-of-the-art Si nanoelectronic devices has been one of the key front-end reliability concerns for further CMOS technology downscaling. In this paper, we present latest findings using physical analysis techniques such as transmission electron microscopy (TEM)/electron energy loss spectroscopy (EELS)/energy dispersive X-ray (EDS), scanning tunneling (STM) and ballistic-electron-emission (BEEM) to study morphology chemical nature nanosize...

10.1109/ipfa.2010.5531983 article EN 2010-07-01

Field-effect transistor (FET)-based biosensors exhibit excellent performance characteristics such as small size, ease of mass production, high versatility, and comparably low cost. In recent years, numerous FET based on various nanomaterials including silicon nanowires, carbon nanotubes, graphene, transition metal dichalcogenides have been developed to detect a wide range biomarkers that play crucial role in early disease diagnosis, therapeutic monitoring prognostic assessment. This review...

10.1142/s1793292024300056 article EN NANO 2024-04-18

STEM/EELS were used to probe the localized electronic structures of defective oxide. Our results show that breakdown oxide are similar oxygen deficient suboxide with formation vacancies. The understanding basic material properties will be helpful for improvements state-of-the-art devices.

10.1109/irps.2009.5173331 article EN 2009-01-01

Polymer has been extensively used in construction Singapore during the past few decades and become a necessary component of some building materials including polymer modified cement mortar, epoxy or Polyurethane (PU) floor screed injection materials, fiber-reinforced plastic (FRP) materials. Compare with conventional concrete, concrete composites may achieve remarkable advantages, such as high tension, flexural strength, ductility, ability to absorb energy, resistance chemical attack,...

10.4028/www.scientific.net/amr.1129.102 article EN Advanced materials research 2015-11-01

How can a metal-oxide-semiconductor (MOS) transistor suffer from multiple dielectric breakdowns (BD) with severe structural damages (e.g., local melting and metal migration) remain functional? Our results show that the amorphization of Si in vicinity BD forms an effective p-n diode which prevents terminal short happening when reverse-biased.

10.1109/ipfa.2009.5232677 article EN 2009-07-01

In this paper, we introduce a sample preparation technique for two-dimensional (2D) dopant concentration profiling in silicon based devices. Selective chemical etching will be shown series of tunneling field-effect transistors (FETs). It is experimentally proven that method offers high success rate and provides simple route to Transmission Electron Microscopy (TEM) study 2D profiles. This foreseen great value dopant-related failure analysis (FA) logic memory

10.1109/ipfa.2012.6306271 article EN 2012-07-01

Post-breakdown reliability forms an important aspect of ultrathin gate dielectric lifetime projection in state-of-the-art MOSFET. In particular, digital breakdown plays a predominant role the early stage breakdown. this paper, we review importance SiON dielectrics less than 2.5 nm, possible underlying mechanism(s) and its impact on post-BD device operating at nominal voltages.

10.1109/icsict.2008.4734516 article EN 2008-10-01
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