A5020151675- Semiconductor materials and devices
- Radio Frequency Integrated Circuit Design
- Advancements in Semiconductor Devices and Circuit Design
- Microwave Engineering and Waveguides
- 3D IC and TSV technologies
- Photonic and Optical Devices
- Integrated Circuits and Semiconductor Failure Analysis
- Phase-change materials and chalcogenides
- Chalcogenide Semiconductor Thin Films
- Semiconductor materials and interfaces
- Millimeter-Wave Propagation and Modeling
- Thin-Film Transistor Technologies
- Nanowire Synthesis and Applications
- Microwave and Dielectric Measurement Techniques
- Silicon Nanostructures and Photoluminescence
- GaN-based semiconductor devices and materials
- Electromagnetic Compatibility and Noise Suppression
- Acoustic Wave Resonator Technologies
- Silicon Carbide Semiconductor Technologies
- Silicon and Solar Cell Technologies
- Semiconductor Lasers and Optical Devices
- Analog and Mixed-Signal Circuit Design
- Electrostatic Discharge in Electronics
- Copper Interconnects and Reliability
- Semiconductor Quantum Structures and Devices
CEA Grenoble
2019-2024
Commissariat à l'Énergie Atomique et aux Énergies Alternatives
2019-2024
Institut polytechnique de Grenoble
2019-2024
CEA LETI
2019-2024
Université Grenoble Alpes
2014-2024
Techniques of Informatics and Microelectronics for Integrated Systems Architecture
2018
STMicroelectronics (France)
2018
Institut de Microélectronique, Electromagnétisme et Photonique
2014-2016
McGill University
2004
Universidad Autónoma del Estado de Morelos
1998
The study presented in this article concerns germanium telluride (GeTe) phase-change material-based switches, actuated via direct heating and arranged through two configurations: series or shunt. It is concluded that provides a performing solution for GeTe amorphization, preventing heater aging. configurations are compared terms of RF performance, power handling, linearity. Some design rules derived from empirical data, consolidated with thermal simulations. In either configuration, large,...
A new concept of integrated coupled-lines couplers based on coupled slow-wave CPWs is presented. Design rules are also addressed. Two different designed for a proof-of-concept, with weak (16 dB) and strong (3 coupling. Great directivity improvement size area reduction achieved when compared to microstrip couplers. Moreover, coupling 3 dB can be realizable geometries, whereas lines geometries remain incompatible standard CMOS process.
This article focuses on the design of high-performance coupled slow-wave coplanar waveguide (CS-CPW) in CMOS technologies for millimeter-wave (mm-wave) frequency bands. First, theory as well electrical model CS-CPW are presented. Next, analytical approach calculation parameters is discussed. Then, by using developed model, two mm-wave backward directional 3-dB couplers designed a bipolar complementary metal-oxide-semiconductor (BiCMOS) 55-nm technology 120- and 185-GHz operation,...
A robust and low cost Si RFSOI Power Transistor which can deliver +31dBm output power with 74% of Added Efficiency (PAE) 18dB Gain has been optimized for 4G & 5G sub-6GHz Amplifier (PA). By means innovative characterizations combining RF aging tests modeling, it is proved that this great performance be achieved while maintaining a very high level reliability the PA transistor.
This paper presents a mm-wave compact, ultra-wideband reflection-type phase shifter (RTPS). is dedicated to phased array transmitter based on LO-path shifting for beamforming and beam-steering applications in the sub-mm-wave band. The proposed RTPS designed using slow-wave coplanar waveguide coupler reflective loads. circuit was fabricated BiCMOS 55 nm technology. As predicted by simulations, measurement results show relative shift of 61°±1° that very stable over wide frequency range from 30...
For the first time FDSOI CMOS transistors with Si-monocrystalline channel have been fabricated at a temperature below 500°C. High performance PMOS (Ion=450μA/μm (Vdd −0.9V) @ Ioff=2nA/μm Lg=35nm) low overlap capacitance (0.46fF/μm per device), gate resistance (10Ω) Low Temperature (LT) enables to achieve good RF Figure-Of-Merit (FOM) Fmax values up 170GHz. In addition, we demonstrate for full functionality of Ring Oscillators (RO) and SRAM bitcells processed 500°C, paving way...
Film bulk acoustic wave resonators (FBAR) based on LiNbO <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</inf> single crystal piezoelectric films offer promising perspectives towards wide bandwidth filters. We present the Y+36° orientation, which promotes excitation of longitudinal waves. This allows reaching resonance frequencies 4.3 GHz for 600 nm-thick films, with electromechanical coupling factors 21.4%, quality 255 and impedance ratios...
We report on polysilicon trap-rich layers fabricated locally by ion implantation and nanosecond laser annealing high-resistivity Si substrates. Using coplanar waveguides (of 1.5 mm length, $70 \mu \mathrm{m}$ central line width $42 spacing between planar ground) we demonstrated RF figures of merit with the second harmonic -84 dBm at an input power 15 losses lower than 0.10 dB/mm a 10 GHz frequency. The characteristics are stable bias voltage. proposed method is intended to fabricate in...
RF performance and intertier coupling of CMOS processed in 3-D sequential integration are investigated. pMOS transistor fabricated with a 500 °C thermal budget features good figures merit f <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">t</sub> = 105 GHz xmlns:xlink="http://www.w3.org/1999/xlink">max</sub> 175 for gate length 45 nm V xmlns:xlink="http://www.w3.org/1999/xlink">DD</sub> -1 V. Moreover, we demonstrate that the low- k SiCO oxide...
For the first time, an in-depth analysis of inter-tier dynamic coupling and RF crosstalk digital circuits in 3D sequential integration enables to conclude on need a Ground Plane (GP) for various applications. Experiments conjunction with TCAD simulations reveal parasitic capacitances responsible effects their impact is investigated 2-bitcell SRAM cell circuit configuration. Furthermore, we show greater than 20dB suppression up 100GHz crosstalk, achieved by addition strategically designed...
This paper reports the integration and characterization of germanium telluride (GeTe) phase-change material (PCM)-based RF switches in series configuration with a 89 μm wide PCM element to address sub-6G power handling requirements. Switching conditions using indirect heating, as well small-and large-signal measurements are performed this work. Devices handle up 37 dBm 29 respectively ON-and OFF-state at 915 MHz. These results estimate for first time performances such GeTe compatible...
In this study we investigate the capacitance characterization and modeling of CMOS transistors integrated in 28nm Ultra Thin Body Box (UTBB) Fully Depleted Silicon On Insulator (FD-SOI) technology from room temperature down to 4. 2K. 100MHz 40 GHz RF transistor capacitances with different gate lengths are carefully extracted as a function modeled. We highlight impact carrier freeze-out substrate and, for first time, frequency behavior well resistance variation due cooling.
Optical actuation of GeTe-based radio frequency switches is studied for the first time at 915-nm optical wavelength. By inducing self-heating phase change material through light absorption, this approach removes need integrated micro-heaters. First, laser pulse conditions required to set RF in ON-and OFF-states are found with peak powers up few hundred mW. Amorphization obtained pulses 100 500 ns, and crystallization 2 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML"...
In this study, we investigate the back-gate bias impact on electrical behavior of FD-SOI transistors from room temperature down to 4.2K. For first time, demonstrate how improve RF performances and circuits for cryoCMOS applications. DC characterizations are presented providing an insight underlying physics. We then defined optimization guidelines applied it a Low Noise Amplifier (LNA) operation at 4.2K
RF performance of a fully integrated CMOS 3D Sequential Integration (3DSI) is, for the first time, deeply investigated. We highlight that Top Tier PMOS processed at 630°C can feature good Figure-Of-Merits (FOM) with F <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">t</sub> =55GHz and xmlns:xlink="http://www.w3.org/1999/xlink">max</sub> =80GHz L=30nm V xmlns:xlink="http://www.w3.org/1999/xlink">DD</sub> =-1V. Moreover, it is proved these features...
This paper shows the potential of buried PN junctions as a substrate interface passivation solution to increase effective resistivity (ρeff) figure merit High-Resistivity (HR) suffering from Parasitic Surface Conduction layer (PSC). We characterize Coplanar Waveguides (CPW) in order monitor frequency response. demonstrate that this method can be implemented using an industrial process with reaching 2kΩ.cm 0.1 dB/mm loss at 6 GHz for HR+PN substrate. is suitable local PSC passivation,...
This paper presents a 2-stage low-noise amplifier (LNA) designed in 22 nm fully-depleted silicon-on-insulator (FD-SOI) technology, covering the N259 and N260 millimeter-wave 5G bands. The prototype features 19.9 dB peak gain, 2.5-2.6 noise figure (NF) 6.6 GHz bandwidth (intersection of 3 gain flatness -10 input/output matching), -5.4 dBm third-order input intercept point (IIP3) for 20.8 mW power dissipation. Modulating back-gate bias each stage independently switches LNA operation mode from...
De-embedding structures (transmission lines, open, short) are costly, whether in terms of silicon area or measurement time. In addition, they lead to inaccuracies increasing with frequency the millimeter-wave bands. this paper, we show possibility perform de-embedding HEMT transistors measurements through EM simulations order extract unity-gain cut-off $\left(f_{T}\right)$. Only an open must be measured calibrate simulation. Several techniques studied and compared up 67 GHz, based on...