- Semiconductor materials and devices
- Advancements in Semiconductor Devices and Circuit Design
- Silicon and Solar Cell Technologies
- Advanced Memory and Neural Computing
- Ferroelectric and Negative Capacitance Devices
- Phase-change materials and chalcogenides
- 3D IC and TSV technologies
- Quantum and electron transport phenomena
- Thin-Film Transistor Technologies
- Integrated Circuits and Semiconductor Failure Analysis
- Electronic and Structural Properties of Oxides
- Chalcogenide Semiconductor Thin Films
- Advanced Chemical Physics Studies
- Semiconductor materials and interfaces
- Advanced Thermoelectric Materials and Devices
- Inorganic Fluorides and Related Compounds
- Machine Learning in Materials Science
- Ion-surface interactions and analysis
- Surface and Thin Film Phenomena
- Physics of Superconductivity and Magnetism
- Advanced Surface Polishing Techniques
- Transition Metal Oxide Nanomaterials
- Thermal properties of materials
- Laser Material Processing Techniques
- Silicon Carbide Semiconductor Technologies
CEA Grenoble
2015-2024
CEA LETI
2015-2024
Commissariat à l'Énergie Atomique et aux Énergies Alternatives
2015-2024
Université Grenoble Alpes
2015-2024
European Synchrotron Radiation Facility
2023
Institut polytechnique de Grenoble
2013-2022
Institut Néel
2017
IMDEA Materials
2012-2015
Centre d’Élaboration de Matériaux et d’Études Structurales
2015
GlobalFoundries (Singapore)
2015
3D sequential integration enables the full use of third dimension thanks to its high alignment performance. In this paper, we address major challenges integration: in particular, control molecular bonding allows us obtain pristine quality top active layer. With help Solid Phase Epitaxy, can match performance FET, processed at low temperature (600°C), with bottom FET devices. Finally, development a stable salicide retain after processing. Overcoming these technological issues offers wide...
3D VLSI with a CoolCube™ integration allows vertically stacking several layers of devices unique connecting via density above million/mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> . This results in increased no extra cost associated to transistor scaling, while benefiting from gains power and performance thanks wire-length reduction. technology leads high top transistors Thermal Budgets (TB) compatible bottom MOSFET integrity. Key...
In this paper we clarify for the first time correlation between endurance, window margin and retention of Resistive RAM. To aim, various classes RRAM (OXRAM CBRAM) are investigated, showing high up to 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">10</sup> cycles or 300°C retention. From principle calculations, analyze conducting filament composition technologies, extract key features. We then propose an analytical model calculate dependence...
3D Sequential Integration (3DSI) with ultra-small contact pitch (<;100nm) offers new partitioning options at fine granularities. This paper reviews potential applications ranging from computing to sensor interface and gives an update on 3DSI device development. Low-temperature processing techniques have made great progress High Performance (HP) digital stacked FETs for application can be achieved a 500°C Thermal Budget (TB). In addition, ULK/metal lines capable of withstanding this TB used...
Compared with TSV-based 3D ICs, monolithic or sequential ICs presents "true" benefits of going to the vertical dimension as stacked layers can be connected at transistor scale. The high versatility this technology is evidenced via several examples requiring small contact pitch. Monolithic shown enable substantial gain in area and performance compared planar without scaling node. This paper summarizes technological challenges concept: it offers a general overview potential solutions obtain...
Abstract Here, the impact of copper and oxygen vacancy balance in filament composition as a key factor for oxide‐based conductive bridge random access memories (hybrid resistive (HRRAMs)) performances is investigated. To this aim, several RRAM technologies are studied using various layers top electrodes. Material analyses allow to highlight hybrid aspect HRRAM filament. Density functional theory simulations used extract microscopic features differences from material point view. Integrated...
Monolithic or sequential 3D Integration is a powerful technological enabler for actual IC design as the stacked layers can be connected at transistor scale. This paper reviews opportunities brought by M3DI and highlights applications benefiting from this small contact pitch. It also presents challenges of concept offers general overview potential solutions to obtain high performance low temperature top while keeping bottom MOSFET integrity.
We experimentally study the coupling of Group V donor spins in silicon to mechanical strain, and measure strain-induced frequency shifts which are linear contrast quadratic dependence predicted by valley repopulation model (VRM), therefore orders magnitude greater than that VRM for small strains $|\varepsilon| < 10^{-5}$. Through both tight-binding first principles calculations we find these arise from a tuning hyperfine interaction term hydrostatic component strain achieve semi-quantitative...
X-ray photoemission spectroscopy (XPS) provides direct information on atomic composition and stoichiometry by measuring core-electron binding energies. Moreover, from the shift of energy, so-called chemical shift, precise type bonds can be inferred, which brings additional local structure. In this work, we present a theoretical study first comparing different theories, Hartree-Fock density functional theory to many-body perturbation approaches like GW approximation its static version...
We investigate the existence of linear-in-momentum spin orbit interactions in valence band Ge/GeSi heterostructures using an atomistic tight-binding method. show that symmetry breaking at interfaces gives rise to a linear Dresselhaus-type interaction for heavy holes. This results from heavy-hole/light-hole mixings induced by and can be captured suitable correction minimal Luttinger-Kohn, four bands $\mathbf{k}\ifmmode\cdot\else\textperiodcentered\fi{}\mathbf{p}$ Hamiltonian. It is dependent...
We address the role of Ti/HfO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> interface on conductive filament (CF) formation within context oxide-based resistive random access memories (OxRRAMs). investigate oxygen defects and diffusion at through ab initio calculations. The calculated energy barriers compare well with available experimental data. Through region charge analysis associated energies O defect migration into Ti, our results...
In this paper the memory performances of TiN/HfO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> /Ti/TiN and TiN/Ta O xmlns:xlink="http://www.w3.org/1999/xlink">5</sub> /TaOx/TiN stacks are compared. First, bipolar switching parameters effect compliance current on window endurance investigated. Then, data retention properties compared at a given operating (100μA). Ta based stack exhibits better (2 decades) retention, while HfO one shows...
Using density functional theory, we investigated the formation of an extended Frenkel pair (EFP) in monoclinic m-HfO2 which propose to be a prototype defect oxide reduction by intense electric field. We studied emission mechanism that involves cascading migration 3-fold coordinated O atoms along [001̅] direction leading well separated oxygen vacancy (VO)/oxygen interstitial (Oi). For neutral case, calculated energy barrier at 5.2 eV is good agreement with activation value extracted from time...
This work studies the intriguing experimental observations that Si(111) solid phase epitaxial regrowth velocity is not constant as recrystallization progresses, but has a sudden change after of ≈100 nm and progresses faster afterward.[L. Csepregi, J. W. Mayer, T. Sigmon, Appl. Phys. Lett. 29(2), 92 (1976)] These two modes have important implications in quality recrystallized silicon. The first produces flat advancing front leaving heavy dense network small parallel to surface twins behind,...
3D sequential integration requires top FETs processed with a low thermal budget (500–600°C). In this work, high performance temperature FDSOI devices are obtained thanks to the adapted extension first architecture and introduction of mobility boosters (pMOS: SiGe 27% channel / SiGe:B 35% RSD nMOS: SiC:P RSD). This demonstration n p shows that activated device can match state-of-the-art process (above 1000°C).
PbS quantum dots (QDs), among the most mature nanocrystals obtained by colloidal chemistry, are promising candidates in optoelectronic applications at various operational frequencies. QD device performances often determined charge transport, either carrier injection before photoemission or detection after photoabsorption, which is significantly influenced dielectric environment. Here, we present electronic structure and optical gap of QDs versus size for solvents calculated using ab initio...
Thermal conductivity is a fundamental material property that plays an essential role in technology, but its accurate evaluation presents challenge for theory. In this work, we demonstrate the application of $E(3)$-equivariant neutral network interatomic potentials within Green-Kubo formalism to determine lattice thermal amorphous and crystalline materials. We apply method study germanium telluride (GeTe) as prototypical phase change material. A single deep learning potential able describe...
We propose an atomistic comprehensive model based on a lattice kinetic Monte Carlo approach to analyse the impact of in-plane uniaxial stress during solid phase epitaxial regrowth. observed no influence tensile regrowth kinetics. In contrast, compressive leads (i) reduction macroscopic velocity, (ii) enhancement amorphous/crystalline interface roughness, and (iii) defective Si formation. Our observations are in good agreement with experimental data from literature. also clarifies...
In this paper, we investigate the link between various resistive memory (RRAM) electrical characteristics: endurance, window margin (WM), and retention. For purpose, several RRAMs are characterized using layers bottom electrodes. By focusing on one technology optimizing programming conditions (current, voltage, time), establish a tradeoff endurance WM. Then, by changing stack, demonstrate correlation plus marging improvement retention degradation. Studying last feature from material point of...
The electric potential, field, and charge density of a monolayer MoS2 have been quantitatively measured at atomic-scale resolution. This has performed by off-axis electron holography using double aberration-corrected transmission microscope operated 80 kV low beam current density. Using this dose rate acceleration voltage, the specimen damage is limited during imaging. In order to improve sensitivity measurement, series holograms acquired. Instabilities such as drifts specimen, biprism,...
For the first time FDSOI CMOS transistors with Si-monocrystalline channel have been fabricated at a temperature below 500°C. High performance PMOS (Ion=450μA/μm (Vdd −0.9V) @ Ioff=2nA/μm Lg=35nm) low overlap capacitance (0.46fF/μm per device), gate resistance (10Ω) Low Temperature (LT) enables to achieve good RF Figure-Of-Merit (FOM) Fmax values up 170GHz. In addition, we demonstrate for full functionality of Ring Oscillators (RO) and SRAM bitcells processed 500°C, paving way...
3D VLSI integration is a promising alternative path towards CMOS scalability. It requires Low Temperature (LT) processing (≤600°C) for top FET fabrication. In this work, record performance demonstrated LT TriGate and FDSOI devices using Solid Phase Epitaxy (SPE). Optimization guidelines further improvement are given FD, FinFET on insulator with the constraint of 14nm node channel strain preservation. This work concludes that extension first process scheme (implantation before raised source...
Processing a high performance transistor at temperature lower than 650°C is the main challenge of 3D sequential integration. This paper shows how FDSOI architecture enables to overcome issues observed in bulk devices, i.e: higher junction leakage and deactivation allow matching low devices with their counterparts.