A5065862091- Semiconductor materials and devices
- Additive Manufacturing Materials and Processes
- Silicon Carbide Semiconductor Technologies
- Laser Material Processing Techniques
- Silicon and Solar Cell Technologies
- Thin-Film Transistor Technologies
- Advancements in Semiconductor Devices and Circuit Design
- Silicon Nanostructures and Photoluminescence
- High Entropy Alloys Studies
- Integrated Circuits and Semiconductor Failure Analysis
- Aluminum Alloy Microstructure Properties
- Semiconductor materials and interfaces
- Surface Roughness and Optical Measurements
- Ion-surface interactions and analysis
- 3D IC and TSV technologies
- Additive Manufacturing and 3D Printing Technologies
- nanoparticles nucleation surface interactions
- Advanced Surface Polishing Techniques
- High-Temperature Coating Behaviors
- Nanowire Synthesis and Applications
- Advanced machining processes and optimization
- Metal and Thin Film Mechanics
- Electronic Packaging and Soldering Technologies
- Nuclear Materials and Properties
- Laser-Ablation Synthesis of Nanoparticles
CEA LETI
2023-2025
Commissariat à l'Énergie Atomique et aux Énergies Alternatives
2021-2025
Université Grenoble Alpes
2021-2025
CEA Grenoble
2023-2025
Institut polytechnique de Grenoble
2024
CEA LITEN
2020-2022
Abstract Today, global electrification requires new materials for power applications. 4H-SiC dominates the market due to its excellent energy efficiency and wide operating range. This study explores formation of Ni/4H-SiC backside ohmic contacts using 308 nm nanosecond laser annealing (NLA). After depositing an 80 layer Ni onto wafers through sputtering, different parameters were tested. The densities (ED) ranged from 2.4 5.4 J/cm², number pulses applied varied 1 20, chuck temperatures 25...
33 nm thick silicon on insulator films were implanted with boron at high dose (1.5 × 1016 or 2.5 at/cm2) and low energy (3 4 keV), then further annealed 160 ns laser pulses. When the is set such as to lead near complete melt of silicon, superconductivity found in keV-implanted only, a critical temperature that increases from 270 390 mK. This latter 200 mK higher than one recently reported polycrystalline same thickness. Transmission electron microscopy images demonstrate this particular are...
In this study, we propose a novel method to quantify the interfacial water trapped at direct bonding interface. The concept is intentionally create defects with controlled size and shape, use them as sensors for gases generated through oxidation of material (in our case, Silicon) by adsorbed on surfaces prior bonding. evolution sensor sizes provides valuable insights into amount gas they have trapped, allowing us analyze imbibition effect. Analyzing arrays also enables that was initially...
Nowadays, the growing worldwide electrification requires new materials for power management. SiC currently dominates market thanks to excellent energy efficiency and broad operating capabilities. The present paper proposes an experimental study of Ni-SiC backside ohmic contact formation using 308 nm nanosecond laser annealing (NLA). After Nickel (80 nm) sputtering over 4H-SiC wafers, various conditions are investigated, with density (ED) ranging from 2.4 5.4 J/cm², pulse number 1 20 chuck...
Ultraviolet nanosecond laser annealing (UV-NLA) proves to be an important technique, particularly when tightly controlled heating and melting are necessary. In the realm of semiconductor technologies, significance (NLA) grows in tandem with escalating intricacy integration schemes nano-scaled devices. Silicon-germanium alloys have been studied for decades their compatibility silicon Indeed, they enable manipulation properties like strain, carrier mobilities bandgap. this framework, can...
Ultraviolet nanosecond laser annealing (UV‐NLA) proves to be an important technique, particularly when tightly controlled heating and melting are necessary. In the realm of semiconductor technologies, significance NLA grows in tandem with escalating intricacy integration schemes nanoscaled devices. Silicon–germanium alloys studied for decades their compatibility silicon Indeed, they enable manipulation properties like strain, carrier mobilities, bandgap. this framework, can instance boost...
This paper demonstrates for the first time a new annealing scheme to form p-type junctions in SiC by high temperature ion implantation followed laser without use of protective carbon capping layer. novel approach leverages higher substrate temperatures during implant minimize implant-induced defects implantation, which enables reduced thermal budget dopant activation. Laser surface implanted layer than conventional using furnace. The shorter results activation while minimizing, formation...
Laser annealing was employed to trigger the solid-state reaction of a thin Co film (2.5 nm) with undoped Si. A metastable disilicide layer obtained after one laser pulse close melt threshold. Its diffraction pattern, relaxed lattice parameter, and residual resisitivity are consistent formation defective CsCl structure. The CoSi2 phase found prolonging thermal treatment additional pulses or rapid annealing. Because CoSi is skipped in sequence, layers more uniform thickness, have an increased...
A SiC MOSFET fabricated on a thin 15R-SiC layer top of 4H-SiC would benefit from both the higher inversion channel mobility and bulk 4H-SiC. In this work, method based Al implantation followed by UV laser annealing (UV-LA) to form 4H is shown. Evaluation crystal quality polytype identification are performed Raman spectroscopy. We show that UV-LA able grow cure damaged ion until level close pristine substrate. This opens new perspectives for fabrication n-type MOSFETs.
We report an industrially compatible process for the fabrication of superconducting monocrystalline Si films (~ 30 nm thick). Increasing boron implant energy by only one keV enables superconductivity in and makes critical temperature increase up to 390 mK. Time-Resolved-Reflectometry appears as adequate in-line characterization identify most promising conditions.
The EZ-FET (easy-FET) is a simple FDSOI-like (Fully Depleted Silicon On Insulator) device that can be used for the electrical characterization of Si layers fabricated with various types approaches. It notably enables to assess and benchmark low thermal budget, instance 3D sequential integration [1]. For an efficient Low Temperature (LT) films, full should processed at temperature, including gate stack deposition dopants activation junctions formation. To get past limitations LT activation,...
The EZ-FET is a device with simplified architecture and processing that enables fast electrical characterization of semiconductor films on insulators (SOI) only two lithography levels using regular process steps. For low temperature SOI substrates characterization, the must be processed at temperature, including junctions formation i.e., dopant activation process. Two approaches nanosecond laser annealing thermal budget are presented in this work. first classical partial source drain...
Hydrophilic direct bonding is nowadays widely used in microelectronics for SOI substrate fabrication and 3D integration. Trapped water at the interface plays a key role adhesion adherence mechanisms [1]. Previous studies also reported that could penetrate interface. This may modify radial inhomogeneity of [2]. However, this technique requires specific Silicon-to-Silicon bonding, lacks precision needs additional characterizations (XRR, FTIR) to quantify amount trapped In work, we present an...