- Quantum and electron transport phenomena
- Advancements in Semiconductor Devices and Circuit Design
- Magnetic properties of thin films
- Semiconductor materials and devices
- Physics of Superconductivity and Magnetism
- Quantum Computing Algorithms and Architecture
- Advanced Memory and Neural Computing
- Quantum Information and Cryptography
- Quantum-Dot Cellular Automata
- Ferroelectric and Negative Capacitance Devices
- Photonic and Optical Devices
- Copper Interconnects and Reliability
- Advancements in Photolithography Techniques
- Surface and Thin Film Phenomena
- Electron and X-Ray Spectroscopy Techniques
- Semiconductor materials and interfaces
- Advanced Materials Characterization Techniques
- Particle accelerators and beam dynamics
- Semiconductor Quantum Structures and Devices
- Integrated Circuits and Semiconductor Failure Analysis
- Markov Chains and Monte Carlo Methods
- Theoretical and Computational Physics
- Electronic and Structural Properties of Oxides
- Semiconductor Lasers and Optical Devices
- Electromagnetic Launch and Propulsion Technology
IMEC
2017-2024
Shanghai Jiao Tong University
2023
Imec the Netherlands
2021
KU Leuven
2018
Centre de Nanosciences et de Nanotechnologies
2018
Université Paris-Saclay
2018
Université Paris-Sud
2018
Centre National de la Recherche Scientifique
2018
Intel (United States)
2018
Abstract Silicon spin qubits are promising candidates for scalable quantum computers, due to their coherence and compatibility with CMOS technology. Advanced industrial processes ensure wafer-scale uniformity high device yield, but traditional transistor cannot be directly transferred qubit structures. To leverage the micro-electronics industry expertise, we customize a 300 mm wafer fabrication line silicon MOS integration. With careful optimization of gate stack, report uniform dot...
Abstract As the superconducting qubit platform matures towards ever-larger scales in race a practical quantum computer, limitations due to inhomogeneity through lack of process control become apparent. To benefit from advanced industry-scale CMOS fabrication facilities, different processing methods will be required. In particular, double-angle evaporation and lift-off techniques used for current, state-of-the-art qubits are generally incompatible with modern-day manufacturable processes....
The spin of an electron confined in semiconductor quantum dots is currently a promising candidate for bit (qubit) implementations. Taking advantage the existing CMOS integration technologies, such devices can offer platform large scale computation. However, mechanical framework bridging device's physical design and operational parameters to qubit's energy space lacking. Furthermore, charge coupling introduced by intrinsic or induced spin-orbit interaction (SOI) exposes qubits noise...
In this work, Ru wires patterning by direct etch are evaluated for a potential 5 nm technology node. The characteristics of etching varying the bias voltage, total flow rate and Cl2/(O2+Cl2) gas ratio studied in an inductively couple plasma chamber. sidewalls profile with tapering angle 90° to SiO2 hard mask selectivity 6 achieved. authors show feasibility lines aspect up 3.5 critical dimension down 10.5 (with 3σ line width roughness 4.2 nm), which paves way further scaling approach....
Continued scaling dimensions of interconnects used for Si chip integration reduces the available cross sectional area conduction. As Cu requires a protective diffusion barrier, TaN and liner such as Co or Ru is frequently chosen to fulfill various requirements time dependent dielectric breakdown (TDDB). Due higher resistivity, barrier/ thickness with line dimension desirable, but has proven difficult much below 2nm. One aspect here limited conformality when using physical vapor deposition...
We analyse the phenomenon of back-hopping in spin-torque induced switching magnetization perpendicularly magnetized tunnel junctions. The analysis is based on single-shot time-resolved conductance measurements pulse-induced back-hopping. Studying several material variants reveals that a feature nominally fixed system junction. found to proceed by two sequential events lead final state P' close --but distinct from-- conventional parallel state. does not exist at remanence. It generally...
Exploring the third dimension in magnonic systems is essential for investigation of alternative physical phenomena and control spin-wave propagation at nanoscale. Here, characteristics spin waves vertical meander-shaped ${\mathrm{Co}}_{40}{\mathrm{Fe}}_{40}{\mathrm{B}}_{20}$ thin films consisting nanosegments located 90\ifmmode^\circ\else\textdegree\fi{} angles with respect to each other are investigated by Brillouin-light-scattering spectroscopy over four Brillouin zones reciprocal space....
Abstract Silicon spin qubits are among the most promising candidates for large scale quantum computers, due to their excellent coherence and compatibility with CMOS technology upscaling. Advanced industrial process flows allow wafer-scale uniformity high device yield, but off shelf transistor processes cannot be directly transferred qubit structures different designs operation conditions. To therefore leverage know-how of micro-electronics industry, we customize a 300mm wafer fabrication...
Ruthenium has been recently considered as a promising candidate to replace copper the BEOL interconnect material for sub-5nm technology nodes. In this work, single level Ru interconnects were fabricated in imec's 300-mm pilot line using EUV lithography and subtractive etch of films. Lines with critical dimension smaller than 10.5 nm formed electrically tested assess resistance patterned Ru. Using TCR method, structures resistivity 15 μΩ.cm cross-sectional area 200 <sup...
In the context of neuromorphic computation, spintronic memristors are investigated for their use as synaptic weights. this paper, we propose and experimentally demonstrate a resistive device based on ten magnetic tunnel junctions (MTJs) connected in serial configuration. Our exhibits multiple resistance levels that support its element. It allows two operating knobs: external field voltage pulses (Spin-Transfer Torque). Moreover, it can be operated different ways. When varying continuously...
Quantum computers based on solid state qubits have been a subject of rapid development in recent years. In current Noisy Intermediate-Scale (NISQ) technology, each quantum device is controlled and characterised though dedicated signal line between room temperature base dilution refrigerator. This approach not scalable currently limiting the large-scale system integration characterisation. Here we demonstrate custom designed cryo-CMOS multiplexer operating at 32 mK. The exhibits excellent...
This paper summarizes findings on the iN7 platform (foundry N5 equivalent) for single exposure EUV (SE EUV) of M1 and M2 BEOL layers. Logic structures within these layers have been measured after litho etch, variability was characterized both with conventional CD-SEM measurements as well Hitachi contouring method. After analyzing patterning layers, impact potential interconnect reliability studied by using MonteCarlo process emulation simulations to determine if current litho/etch...
Abstract We present the development of Nb/Al–AlO x /Nb trilayer stacks and implementation a full 300 mm process flow for fabrication trilayer-based superconducting qubits. Room temperature electrical characterization tens thousands Josephson junctions showed good agreement between blanket resistance-area (RA) product RA processed wafers. Cross-bridge Kelvin resistor structures with dimensions ranging from 200 nm to 1.2 μ m were tested exhibited excellent yield exceptionally low resistance...
The fabrication of superconducting circuits requires multiple deposition, etching, and cleaning steps, each possibly introducing material property changes microscopic defects. In this work, we specifically investigate the process argon milling, a potentially coherence-limiting step, using niobium aluminum resonators as proxy for surface-limited behavior qubits. We find that microwave exhibit an order magnitude decrease in quality factors after surface while are resilient to same process....
The epitaxial growth of a strained Ge layer, which is promising candidate for the channel material hole spin qubit, has been demonstrated on 300 mm Si wafers using commercially available Si0.3Ge0.7 strain relaxed buffer (SRB) layers. assessment layer and interface qualities buried embedded in layers reported. XRD reciprocal space mapping confirmed that reduction temperature enables 2-dimensional fully with respect to Si0.3Ge0.7. Nevertheless, dislocations at top and/or bottom were observed...
The development of superconducting qubit technology has shown great potential for the construction practical quantum computers. As complexity processors continues to grow, need stringent fabrication tolerances becomes increasingly critical. Utilizing advanced industrial processes could facilitate necessary level control support continued scaling processors. However, these are currently not optimized produce high coherence devices, nor they a priori compatible with commonly used approaches...
<title>Abstract</title> The realisation of an universal quantum computer will require the operation thousands to millions qubits. possibility using existing industrial semiconductor fabrication techniques and infrastructure for up-scaling reproducibility makes silicon based spin qubits one most promising platforms achieve this goal. implementation up now largest processor was realized in a silicon/silicon-germanium heterostructure known its low charge noise, long qubit coherence times fast...
Spin logic devices based on domain wall (DW) motion offer flexible architectures to store and carry information in a circuit. In this device concept, is encoded the magnetic state of track shared by multiple tunnel junctions (MTJs) processed DW motion. Here, we demonstrate that all-electrical control such nanoscale DW-based can be realized using novel MTJ stack. addition field-driven motion, which isotropic, show directional DWs driven current, key requirement for operation. Full electrical...
With the rapid progress of spintronic devices, spin-logic concepts hold promises energy-delay conscious computation for efficient logic gate operations. We report on electrical characterization domain walls in interconnected magnetic tunnel junctions. By means spin-transfer torque effect, domains are produced at common free layer and its propagation towards output pillar sensed by tunneling magneto-resistance. Domain pinning conditions studied quasi-statically showing a strong dependence...
We demonstrate an integration approach to enable 16nm half-pitch interconnects suitable for the 5nm technology node using 193i Lithography, SADP, SAQP, three times Litho-Etch (LE3) and tone-inversion. A silicon-verified DOE experiment on a SAQP process suggests tight window core etch spacer depositions. also show novel flow which us pattern tight-pitch metal-cut (block), effectively scale trench CD 12nm at pitch 32nm. Finally we discuss line resistance resistivity obtained trenches created flow.
We present a scaled device based on magnetic domain wall (DW) transport for logic applications. The consists of multiple tunnel junctions (MTJs) connected by the same free layer (FL). Magnetic walls are injected spin-transfer torque (STT) at input MTJs and sensed tunneling magnetoresistance (TMR) output MTJ after propagation through FL. Logic functions can be built merging several walls. By enabling real-time detection long range DW transport, we demonstrate spintronic component which used...
The performance of state-of-the-art superconducting quantum devices is currently limited by microwave dielectric losses at different surfaces and interfaces. α-tantalum a superconductor that has proven effective in reducing loss improving device due to its thin low-loss oxide. However, without the use seed layer, this tantalum phase so far only been realised on sapphire substrates, which incompatible with advanced processing industry-scale fabrication facilities. Here, we demonstrate...