- Semiconductor materials and devices
- Thin-Film Transistor Technologies
- Advanced Memory and Neural Computing
- CCD and CMOS Imaging Sensors
- Transition Metal Oxide Nanomaterials
- Hepatocellular Carcinoma Treatment and Prognosis
- Ferroelectric and Negative Capacitance Devices
- Photonic and Optical Devices
- Electronic and Structural Properties of Oxides
- Advanced Optical Imaging Technologies
- Semiconductor Lasers and Optical Devices
- Viral gastroenteritis research and epidemiology
- SARS-CoV-2 and COVID-19 Research
- Multi-Criteria Decision Making
- Neurological Disorders and Treatments
- Acne and Rosacea Treatments and Effects
- Orthodontics and Dentofacial Orthopedics
- Ga2O3 and related materials
- Image Enhancement Techniques
- Optimization and Mathematical Programming
- Obstructive Sleep Apnea Research
- Structural Analysis and Optimization
- Infrared Target Detection Methodologies
- Animal Nutrition and Physiology
- Phase-change materials and chalcogenides
Semiconductor Energy Laboratory (Japan)
2011-2024
Kumamoto University Hospital
2024
Rakuwakai Otowa Hospital
2023-2024
Aichi Gakuin University
2023
Kyoto University
2020
Aso Iizuka Hospital
2019
Osaka University
2018
Kagoshima University
2018
Fukui University of Technology
2011
Shizuoka University
1997
Emerging nonvolatile memory with an oxide–semiconductor-based thin-film transistor (TFT) using indium-gallium-zinc-oxide (IGZO) was developed. The is called oxide–semiconductor random access (NOSRAM). cell of the NOSRAM (NOSRAM cell) consists IGZO TFT for data writing, a normal Si-based p-channel metal-oxide-semiconductor (PMOS) reading, and capacitor storing charge controlling PMOS gate voltage. are formed over PMOS. Owing to extremely low-leakage-current characteristics TFT, stored in 2-fF...
Background This study aimed to evaluate VE of primary, first, and second booster ancestral-strain monovalent mRNA COVID-19 vaccination against symptomatic infections severe diseases in Japan.
We propose Non-Volatile Oxide Semiconductor Random Access Memory (NOSRAM) that is a novel memory including transistor using an oxide semiconductor, In-Ga-Zn Oxide. OS transistors feature extremely low leakage current of about 100-600 yA/μm (1 yA = 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-24</sup> A) at 85°C for example, and are applicable to elements. Our prototype 1Mb NOSRAM has achieved...
We developed an organic light-emitting diode (OLED)/oxide semiconductor (OS)/silicon (Si) display in which Si CMOS drivers can be arranged two-dimensionally by monolithically stacking c-axis-aligned crystalline oxide (CAAC-OS) FETs over CMOS.A CAAC-OS FET exhibits a higher withstand voltage than SiFET of the same size, enabling considerable pixel area reduction.The driven even at low refresh rate owing to its extremely off-state current, making it ideal choice for constructing circuits.This...
We present a three-dimensional (3D) DRAM prototype, which is formed using oxide semiconductor FETs (OSFETs) monolithically stacked on Si CMOS.The OSFETs are composed of one-layer planar FET and two-layer vertical (VFETs).The 1T1C memory cells in the VFET layers primary sense amplifier layer, heterogeneous OSFETs, provide various circuit functions DRAM.The operation 3D 1-Mbit array demonstrated for first time.The results show that proposed operates with read write times 60 ns 50 ns,...
A 3bit/cell nonvolatile oxide semiconductor RAM (NOSRAM) test die comprising c-axis aligned crystal In-Ga-Zn-O TFTs has been fabricated. The write time of the is 100 ns. collectively reads multilevel data within 900 ns with a 3bit A/D converter serving as reading circuit. endurance NOSRAM cell more than 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">12</sup> cycles.
Background Evaluating COVID-19 vaccine effectiveness (VE) domestically is crucial for assessing and determining national vaccination policy. This study aimed to evaluate VE of mRNA vaccines in Japan.Methods We conducted a multicenter test-negative case-control study. The comprised individuals aged ≥16 visiting medical facilities with COVID-19-related signs or symptoms from 1 January 26 June 2022, when Omicron BA.1 BA.2 were dominant nationwide. evaluated primary booster against symptomatic...
Abstract Thirty‐two 15‐day old broiler chicks (Chunky strain ROSS 308) were randomly divided into four treatments in a 2 × factorial design. The main factors diet (basal or basal supplemented with 0.15% astaxanthin‐rich dried cell powder (Panaferd‐P [astaxanthin 30 ppm]) and ambient temperature (thermo‐neutral [25 ± 1°C] high [35 1°C for 6 hr]). Dietary supplementation Panaferd‐P did not affect growth performance, though decreased feed intake the weight of breast tender muscle, liver, heart....
In this paper, we fabricate a 1.50‐inch, 3207‐ppi prototype OLED display with drivers capable of 32‐division driving, which is achieved by monolithically stacking CAAC‐OS FETs over SiFETs. This structure enables narrow bezel and two‐dimensional driver arrangement, leading to independent driving 32 pixel arrays divided source gate lines.
A vision sensor used to capture motion must operate with very low power when in networks where is limited. Frame-based [1] and event-driven [2,3] sensors have been reported. The former captures from the difference between captured data of a previous frame that current frame; thus, it difficult slowly moving object. An object; however, its pixel configuration complicated, perform both capturing image capturing. In this paper, we report for having in-pixel non-volatile analog memory utilizing...
As the number of devices connected to Internet increases, servers and mobile must process increasingly large volumes data, also accommodate increasing demand for high-speed large-capacity working memory keeping power consumption low. This need is being fulfilled by emerging devices, such as resistive RAM, phase-change MRAM [1], which realize high-speed, high-density nonvolatile memory, significantly enhancing performance CPUs with integrated memories.
Li-ion batteries are primarily used as power sources in electronic devices and electric vehicles offer substantial conveniences to consumers. However, fires have broken out likely due micro short-circuit (also called internal or soft shortcircuit) [1]. The is a failure mode where Li metal first precipitates on negative electrode then reaches positive electrode; eventually occurs between the electrodes battery voltage slightly decreases. Repetitive occurrences of will generate heat lead...
Utilizing a c-axis-aligned crystalline oxide semiconductor-based FET, we have fabricated vision sensor with in-pixel nonvolatile analog memory. The realized normal image data capturing, captured differential of given reference frame, and retained the for an extended time in each pixel. Moreover, global shutter capturing motion by extracting images. This is performed using depends on presence or absence differences between images has three operating modes: imaging mode, wait mode....
An OLED display with CAAC‐OS FETs monolithically stacked over SiFETs, capable of 32‐division control resolution and frame rate, was fabricated. This enables that conforms foveal characteristics, thereby reducing the power consumed during operation. The can be driven at 120 Hz, reduced data transmission.
A 16-level cell is demonstrated using a test chip of nonvolatile oxide semiconductor RAM comprising c-axis aligned crystalline In-Ga-Zn FETs. read circuit composed voltage followers outputs with maximum distribution 37 mV. single follower has the 25.3 200 ns write time demonstrated.
Abstract We demonstrate a 16-level cell using nonvolatile oxide semiconductor random access memory test chip based on c -axis-aligned – b -plane-anchored crystal In–Ga–Zn (CAAC-IGZO) FETs. The consists of CAAC-IGZO FET, p-channel metal–oxide–semiconductor Si and capacitor. Data are written threshold voltage cancel write method, read circuit composed followers outputs voltage. Using 200 ns time the chip, obtained maximum distribution width is 37 mV in case 32768 cells. distributions 16...
There has been an increasing need for wide-bandwidth and high-density DRAMs. Wide-bandwidth DRAMs, in which DRAM dies are stacked using a through-silicon via (TSV), have limitation on the number of connected chips due to wide pitch TSV. A 4F <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> cell indium-gallium-zinc oxide FET reported. However, no reports made so far subarray prototypes. To address these issues, we introduce 1-Mbit...
:The effects of the number nests within a neighboring space on reproductive success were examined in Egretta garzetta and Ardea cinerea heronry. Two spaces defined: (i) Neighborhood is enclosed by sphere radius DN whose center located at focal nest; (ii) Surrounding DS (DS > DN) that excludes Neighborhood. set several different values. The had significant negative effect when = 0.5 m for E. =1.5 A. cinerea. positive 1.5 3 or 4.5 m. These results suggest to examine individual differences...
Multilevel cell nonvolatile memory has been developed with a field-effect transistor (FET) containing crystalline oxide semiconductor (OS), specifically c-axis aligned In-Ga-Zn-oxide (CAAC-IGZO). The is called random access (NOSRAM). A NOSRAM consists of CAAC-IGZO FET, p-channel MOS (PMOS) transistor, and capacitor. We have demonstrated that single 3-bit an endurance 10 12 cycles write time 5 ns. 6σ tolerance for V th distribution test chip including 18-kbit array 109 mV. achieves 3-bit/cell NOSRAM.